The ongoing saga regarding spectrum for 3G services, use of dual technologies, etc., reminds me of 2002, the MII, TD-SCDMA and 155MHz! Read on...
Anything on the spectrum spectacle in India makes very interesting reading! It’s as though two sides fighting over a valuable possession. Worth a click!!
We have been following how the two GSM and CDMA lobbies -– COAI and AUSPI -– have been in the news over the use of mixed bands. GSM operators have constantly warned that any move to allocate spectrum in the 1900MHz band to CDMA players would adversely impact their services in the 2100MHz band. We've been following what the TRAI, the DoT and others have to say on all of this.
Then AUSPI informed this week that field trials conducted in Hyderabad last week had proved successful. The trial conducted by AUSPI on behalf of the Department of Telecom (DoT) claims that the co-existence of 1900 MHz and 2100 MHz is possible.
Now, we are told that defence would be vacating spectrum by end of this year and India would have 3G services by next year. Hope all disputes are settled amicably and India finally gets to see what 3G services would have to offer.
I am reminded of two things – one, the 3G license auctions in Europe, which nearly brought the wireless house down in the early 2000s, and two, an interesting development in China. I’ll dwell on the second one.
Nearly seven years ago, I happened to break the news on TD-SCDMA (Time Division-Synchronous Code-Division Multiple Access), a 3G technology being developed at that point of time by Datang Telecom and Siemens. That story link no longer exists, so I'm providing a link to another story, mentioned below.
About two and a half years later, around October 2002, the Ministry of Information Industry (MII) in China allocated a total frequency of 155MHz for TD-SCDMA! This, for an untested, untried 3G technology, in a country much larger than India, was and is still unheard of!
Makes me wonder, why did the MII give away so much of spectrum so long back to an untested 3G technology, when in India, we keep hearing reports about spectrum issues, use of dual technologies, etc. Are there lessons to be learnt from the Chinese example?
On TD-SCDMA, much later, in 2002, I also discovered not many had even heard of it in India. However, around the time I reported this 155MHz spectrum story, STING’s Robin Grewal contacted me in Delhi to find out more about this 3G technology! That was the level of interest in 3G and TD-SCDMA, and spectrum in India, at least, at that time. Things have changed since! Hopefully!!
Thursday, October 25, 2007
Saturday, October 20, 2007
Growth drivers for semiconductor industry
Michael J. Fister, president and CEO, Cadence Design Systems Inc., who was in India for the CDNLive event, delivered a wonderful keynote at the recently held CDNLive. Here's what he had to say!
The semiconductor industry is maturing. Since 2000, the industry’s annual growth rate has experienced extreme highs and lows.
Though the semiconductor industry's revenue growth will be low in 2007, the good news is that growth rates are smoothing out as costly fabs demand consistent production. Wireless communications, computers, and consumer products continue to be the growth drivers for semiconductors. A couple of the semiconductor technology trends driving electronic design and product development are:
* More designs at advanced nodes — Beginning this year, 90nm designs will outnumber those at 130nm. Meanwhile, 65nm is design activity is ramping up and advanced designs are targeting 45nm.
* Growth in transistor count and logic — Not only are transistor counts increasing according to Moore’s Law, those transistors are being used to create more functions -– and therefore more complexity -– on a single chip, not just adding memory to the existing designs.
A related trend is that the amount of chip production outsourced to foundries continues to grow, with many Integrated Device Manufacturers (IDMs) moving to a 'Fab-lite' strategy for advanced nodes. This is happening as design is becoming a greater product differentiation than production.
Note that Fister's reference to Fab-lite is interesting, even though lot of new investments are said to be getting into, and he himself says, "costly fabs demand consistent production." There is another point that should not be overlooked -- the one concerning Qualcomm, a fabless company, making it to the Top 10 semicon companies, for the first time.
Coming back the Cadence CEO, all of these trends create two kinds of challenges for chip design. These are: 1) manufacturability at advanced process nodes like 90nm and below, and 2) increased complexity and scale of chip design of system-on-chip (SoC).
Design solutions today must address these challenges, and increase team productivity and schedule predictability. To accomplish this, Cadence is focused on a holistic approach to the design flow. The Cadence Low-Power Solution and the Encounter Timing System are good examples of this holistic approach addressing the challenges of escalating scale and complexity.
The same holistic approach is shown in Cadence’s approach to manufacturability, which is to integrate design for manufacturability (DFM) into all aspects of the design flow, rather than just apply DFM techniques as a post-design step.
The semiconductor industry is maturing. Since 2000, the industry’s annual growth rate has experienced extreme highs and lows.
Though the semiconductor industry's revenue growth will be low in 2007, the good news is that growth rates are smoothing out as costly fabs demand consistent production. Wireless communications, computers, and consumer products continue to be the growth drivers for semiconductors. A couple of the semiconductor technology trends driving electronic design and product development are:
* More designs at advanced nodes — Beginning this year, 90nm designs will outnumber those at 130nm. Meanwhile, 65nm is design activity is ramping up and advanced designs are targeting 45nm.
* Growth in transistor count and logic — Not only are transistor counts increasing according to Moore’s Law, those transistors are being used to create more functions -– and therefore more complexity -– on a single chip, not just adding memory to the existing designs.
A related trend is that the amount of chip production outsourced to foundries continues to grow, with many Integrated Device Manufacturers (IDMs) moving to a 'Fab-lite' strategy for advanced nodes. This is happening as design is becoming a greater product differentiation than production.
Note that Fister's reference to Fab-lite is interesting, even though lot of new investments are said to be getting into, and he himself says, "costly fabs demand consistent production." There is another point that should not be overlooked -- the one concerning Qualcomm, a fabless company, making it to the Top 10 semicon companies, for the first time.
Coming back the Cadence CEO, all of these trends create two kinds of challenges for chip design. These are: 1) manufacturability at advanced process nodes like 90nm and below, and 2) increased complexity and scale of chip design of system-on-chip (SoC).
Design solutions today must address these challenges, and increase team productivity and schedule predictability. To accomplish this, Cadence is focused on a holistic approach to the design flow. The Cadence Low-Power Solution and the Encounter Timing System are good examples of this holistic approach addressing the challenges of escalating scale and complexity.
The same holistic approach is shown in Cadence’s approach to manufacturability, which is to integrate design for manufacturability (DFM) into all aspects of the design flow, rather than just apply DFM techniques as a post-design step.
Tuesday, October 16, 2007
Measuring performance of carbon nanotubes as building blocks for ultra-tiny computer chips of the future
There is this really great story from IBM Research Labs that I simply have to seed here for my readers.
IBM's scientists have created a method to measure the performance of carbon nanotubes as building blocks for ultra-tiny computer chips of the future. Of course, you can also read it on IBM Research Lab's site as well as on CIOL's semicon site.
IBM scientists have measured the distribution of electrical charges in tubes of carbon that measure less than 2nm in diameter, 50,000 times thinner than a strand of human hair.
This novel technique, which relies on the interactions between electrons and phonons, provides a detailed understanding of the electrical behavior of carbon nanotubes, a material that shows promise as a building block for much smaller, faster and lower power computer chips compared to today's conventional silicon transistors.
Phonons are the atomic vibrations that occur inside material, and can determine the material's thermal and electrical conductivity. Electrons carry and produce the current. Both are important features of materials that can be used to carry electrical signals and perform computations.
The interaction between electrons and phonons can release heat and impede electrical flow inside computer chips. By understanding the interaction of electrons and phonons in carbon nanotubes, the researchers have developed a better way to measure their suitability as wires and semiconductors inside of future computer chips.
In order to make carbon nanotubes useful in building logic circuitry, scientists are pushing to demonstrate their high speed, high packing density and low power consumption capabilities as well as the ability to make them viable for potential mass production.
Dr. Phaedon Avouris, IBM Fellow and lead researcher for IBM's carbon nanotube efforts, said: "The success of nanoelectronics will largely depend on the ability to prepare well characterized and reproducible nano-structures, such as carbon nanotubes. Using this technique, we are now able to see and understand the local electronic behavior of individual carbon nanotubes."
To date, researchers have been able to build carbon nanotube transistors with superior performance, but have been challenged with reproducibility issues. Carbon nanotubes are sensitive to environmental influences.
For example, their properties can be altered by foreign substances, affecting the flow of electrical current and changing device performance. These interactions are typically local and change the density of electrons in the various devices of an integrated circuit, and even along a single nanotube.
IBM's scientists have created a method to measure the performance of carbon nanotubes as building blocks for ultra-tiny computer chips of the future. Of course, you can also read it on IBM Research Lab's site as well as on CIOL's semicon site.
IBM scientists have measured the distribution of electrical charges in tubes of carbon that measure less than 2nm in diameter, 50,000 times thinner than a strand of human hair.
This novel technique, which relies on the interactions between electrons and phonons, provides a detailed understanding of the electrical behavior of carbon nanotubes, a material that shows promise as a building block for much smaller, faster and lower power computer chips compared to today's conventional silicon transistors.
Phonons are the atomic vibrations that occur inside material, and can determine the material's thermal and electrical conductivity. Electrons carry and produce the current. Both are important features of materials that can be used to carry electrical signals and perform computations.
The interaction between electrons and phonons can release heat and impede electrical flow inside computer chips. By understanding the interaction of electrons and phonons in carbon nanotubes, the researchers have developed a better way to measure their suitability as wires and semiconductors inside of future computer chips.
In order to make carbon nanotubes useful in building logic circuitry, scientists are pushing to demonstrate their high speed, high packing density and low power consumption capabilities as well as the ability to make them viable for potential mass production.
Dr. Phaedon Avouris, IBM Fellow and lead researcher for IBM's carbon nanotube efforts, said: "The success of nanoelectronics will largely depend on the ability to prepare well characterized and reproducible nano-structures, such as carbon nanotubes. Using this technique, we are now able to see and understand the local electronic behavior of individual carbon nanotubes."
To date, researchers have been able to build carbon nanotube transistors with superior performance, but have been challenged with reproducibility issues. Carbon nanotubes are sensitive to environmental influences.
For example, their properties can be altered by foreign substances, affecting the flow of electrical current and changing device performance. These interactions are typically local and change the density of electrons in the various devices of an integrated circuit, and even along a single nanotube.
Tuesday, October 9, 2007
France rising in nanotech excellence
This was sent to me by the French Technology Press Office in New Delhi. Reproduced here for readers.
More and more companies from the USA and Japan are investing and launching partnerships in France to take advantage of its cutting-edge nanotechnology expertise. France boasts several zones dedicated to advancing nanotechnology excellence, including the SCS cluster in Sophia Antipolis, the Systematic cluster in the Paris region and notably, the global micro-nanotechnology cluster Minalogic in Grenoble.
In 2007, Minalogic will strengthen its leader status by investing €80 million into 8 new collaborative projects focused on micro and nanotechnologies for next-generation semiconductors and new manufacturing processes, and it recently welcomed Hewlett-Packard as its 50th partner. Starting in September, HP will help cluster members save valuable amounts of time and money with access to highly advanced 2-TeraFlop data processors, called Virtual Nodes.
On the research side, France’s world-class nanotech laboratory CEA-Leti and the leading Japanese lithography company Nikon announced a joint effort to examine Double Patterning and Double Exposure technology for 32 nm semiconductor devices. "Leti offers an outstanding, state-of-the-art facility with all of the processes required for Double Patterning," says Toshikazu Umatate, Executive Officer, Precision Equipment Co., Nikon Corp. Another Japanese leader, Yamatake, is already working with Leti to develop nanotechnologies.
International companies looking to expand in nanotechnology are also choosing France for their European headquarters. The California-based analog semiconductor company Monolithic Power Systems, ranked as one of the fastest growing companies in Silicon Valley by Deloitte, has now opened its headquarters in Bernin-Crolles, and Boc Edwards, part of the Linde Group, has also moved its European semiconductor business headquarters from London to Grenoble to be closer to its electronics customers and to recruit skilled talent in the region.
France’s expertise is expected to grow on the healthcare side of nanotechnologies following the recent announcement of the opening of Clinatec, an experimental nanotechnology-based neurosurgery clinic expected to be set up in the next three years. The clinic will benefit from the work being carried out at Minatec, Europe’s largest research center in micro-nanotechnologies.
More and more companies from the USA and Japan are investing and launching partnerships in France to take advantage of its cutting-edge nanotechnology expertise. France boasts several zones dedicated to advancing nanotechnology excellence, including the SCS cluster in Sophia Antipolis, the Systematic cluster in the Paris region and notably, the global micro-nanotechnology cluster Minalogic in Grenoble.
In 2007, Minalogic will strengthen its leader status by investing €80 million into 8 new collaborative projects focused on micro and nanotechnologies for next-generation semiconductors and new manufacturing processes, and it recently welcomed Hewlett-Packard as its 50th partner. Starting in September, HP will help cluster members save valuable amounts of time and money with access to highly advanced 2-TeraFlop data processors, called Virtual Nodes.
On the research side, France’s world-class nanotech laboratory CEA-Leti and the leading Japanese lithography company Nikon announced a joint effort to examine Double Patterning and Double Exposure technology for 32 nm semiconductor devices. "Leti offers an outstanding, state-of-the-art facility with all of the processes required for Double Patterning," says Toshikazu Umatate, Executive Officer, Precision Equipment Co., Nikon Corp. Another Japanese leader, Yamatake, is already working with Leti to develop nanotechnologies.
International companies looking to expand in nanotechnology are also choosing France for their European headquarters. The California-based analog semiconductor company Monolithic Power Systems, ranked as one of the fastest growing companies in Silicon Valley by Deloitte, has now opened its headquarters in Bernin-Crolles, and Boc Edwards, part of the Linde Group, has also moved its European semiconductor business headquarters from London to Grenoble to be closer to its electronics customers and to recruit skilled talent in the region.
France’s expertise is expected to grow on the healthcare side of nanotechnologies following the recent announcement of the opening of Clinatec, an experimental nanotechnology-based neurosurgery clinic expected to be set up in the next three years. The clinic will benefit from the work being carried out at Minatec, Europe’s largest research center in micro-nanotechnologies.
Wednesday, October 3, 2007
Semicon sales up in August really augurs well for CE industry
The global semiconductor industry can breathe a sigh of relief, hopefully, following the recent report by the Semiconductor Industry Association (SIA), which has said that worldwide semicon sales were up sharply in August 2007.
According to the SIA press release, semicon sales grew to $21.5 billion in August 2007, an increase of 4.9 percent over August 2006, when sales were $20.5 billion, and an increase of 4.5 percent from July of this year when sales were $20.6 billion.
The release further adds that sales of NAND flash memory devices led the growth as supplies tightened and prices firmed. NAND flash sales were up by 48 percent compared to August 2006 and up by 19 percent from July of this year.
Yes, August is historically, the start of a long holiday season build by various manufacturers of electronics products, as SIA also mentions. This drives the demand for a wide range semicon related products.
Having spent considerable time in the Far East and Greater China region, I am well aware of the excitement that builds up starting September -- for a whole line-up of Fall Electronics Shows across Asia. CEATEC, Japan, KES, Korea, Hong Kong Electronics Show, China Sourcing Fair, Taitronics, Taiwan -- for Electronic Components and Finished (Electronics) Products.
There's CEATEC in Japan, which is currently going on at full steam at Makuhari Messe Chiba. CEATEC -- which is short for Combined Exhibition of Advanced Technologies － Providing Image, Information and Communications -- really lives up to its billing.
Already, Toshiba has somewhat rocked the world at CEATEC by announcing plans to manufacture CMOS camera modules for mobile phones in-house. It will be commencing the mass production of world's first CSCM (chip scale camera module) ultra-small camera module applying TCV (through chip via) technology. These modules are also being demoed at CEATEC.
Elsewhere, Broadcom has also fired a salvo, announcing breakthrough technology in form of the VideoCore 3 solution, which will likely be the first to deliver triple-play multimedia at ultra-low power levels for mobile phones. What this means is -- once this solution is applied, your mobile phone would be capable of playing high-definition (HD) video, sport a 12Mpixel digital camera, and deliver ultra-low power 3D graphics for world-class gaming experience.
These are just few examples of happenings in the semiconductor, consumer electronics and components. They do augur well for the industry at large. As the SIA President George Scalise, says, "The semiconductor industry will continue to outpace overall economic growth with consumer demand leading the way."
According to the SIA press release, semicon sales grew to $21.5 billion in August 2007, an increase of 4.9 percent over August 2006, when sales were $20.5 billion, and an increase of 4.5 percent from July of this year when sales were $20.6 billion.
The release further adds that sales of NAND flash memory devices led the growth as supplies tightened and prices firmed. NAND flash sales were up by 48 percent compared to August 2006 and up by 19 percent from July of this year.
Yes, August is historically, the start of a long holiday season build by various manufacturers of electronics products, as SIA also mentions. This drives the demand for a wide range semicon related products.
Having spent considerable time in the Far East and Greater China region, I am well aware of the excitement that builds up starting September -- for a whole line-up of Fall Electronics Shows across Asia. CEATEC, Japan, KES, Korea, Hong Kong Electronics Show, China Sourcing Fair, Taitronics, Taiwan -- for Electronic Components and Finished (Electronics) Products.
There's CEATEC in Japan, which is currently going on at full steam at Makuhari Messe Chiba. CEATEC -- which is short for Combined Exhibition of Advanced Technologies － Providing Image, Information and Communications -- really lives up to its billing.
Already, Toshiba has somewhat rocked the world at CEATEC by announcing plans to manufacture CMOS camera modules for mobile phones in-house. It will be commencing the mass production of world's first CSCM (chip scale camera module) ultra-small camera module applying TCV (through chip via) technology. These modules are also being demoed at CEATEC.
Elsewhere, Broadcom has also fired a salvo, announcing breakthrough technology in form of the VideoCore 3 solution, which will likely be the first to deliver triple-play multimedia at ultra-low power levels for mobile phones. What this means is -- once this solution is applied, your mobile phone would be capable of playing high-definition (HD) video, sport a 12Mpixel digital camera, and deliver ultra-low power 3D graphics for world-class gaming experience.
These are just few examples of happenings in the semiconductor, consumer electronics and components. They do augur well for the industry at large. As the SIA President George Scalise, says, "The semiconductor industry will continue to outpace overall economic growth with consumer demand leading the way."
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