What
are the top five trends likely to rule the global semiconductor
industry in 2014 and why? Rich Goldman, VP, corporate marketing and
strategic alliances, Synopsys, had this to say.
FinFETs
FinFETs
will be a huge trend through 2014 and beyond. Semiconductor companies
will certainly keep us well informed as they progress through FinFET
tapeouts and ultimately deliver production FinFET processes.
They
will tout the power and speed advantages that their FinFET processes
deliver for their customers, and those semiconductor companies early to
market with FinFETs will press their advantage by driving and announcing
aggressive FinFET roadmaps.
IP and subsystems
As
devices grow more complex, integrating third-party IP has become
mainstream. Designers recognize as a matter of course that today’s
complex designs benefit greatly from integrating third-party IP in such
areas as microprocessors and specialized I/Os.
The trend for
re-use is beginning to expand upwards to systems of integrated, tested
IP so that designers no longer need to redesign well-understood systems,
such as memory, audio and sensor systems.
Internet of Things/sensors
Everybody
is talking about the Internet of Things for good reason. It is
happening, and 2014 will be a year of huge growth for connected things.
Sensors will emerge as a big enabler of the Internet of Things, as they
connect our real world to computation.
Beyond the mobile
juggernaut, new devices such as Google’s (formerly Nest’s) thermostat
and smoke detector will enter the market, allowing us to observe and
control our surrounding environment remotely.
The mobile phone
will continue to subsume and disrupt markets, such as cameras, fitness
devices, satellite navigation systems and even flashlights, enabled by
sensors such as touch, capacitive pattern, gyroscopic, accelerometers,
compasses, altimeters, light, CO, ionization etc. Semiconductor
companies positioned to serve the Internet of Things with sensor
integration will do well.
Systems companies bringing IC design in-house
Large
and successful systems companies wanting to differentiate their
solutions are bringing IC specification and/or design in house.
Previously, these companies were focused primarily on systems and
solutions design and development.
Driven by a belief that they
can design the best ICs for their specific needs, today’s large and
successful companies such as Google, Microsoft and others are leading
this trend, aided by IP reuse.
Advanced designs at emerging and established process nodes
While
leading-edge semiconductor companies drive forward on emerging process
nodes such as 20nm, others are finding success by focusing on
established nodes (28nm and above) that deliver required performance at
reduced risk. Thus, challenging designs will emerge at both ends of the
spectrum.
Part II of this discussion will look at FinFETs below 20nm and 3D ICs.
Friday, January 24, 2014
Wednesday, January 1, 2014
Can 2014 be a major year for global semicon industry?
2014 is expected to be a major year for the global semiconductor industry. The industry will and continue to innovate!
Apparently, there are huge expectations from certain segments such as the so-called Internet of Things (IoT) and wearable electronics, for instance. There will likely be focus on the connected car. Executives have been stating there could be third parties writing apps that can help cars. Intel expects that technology will be inspiring optimism for healthcare in future. As per a survey, 57 percent of people believe traditional hospitals will be obsolete in the future.
Qualcomm introduced the Snapdragon 410 chipset with integrated 4G LTE world mode for high-volume smartphones. STMicroelectronics has joined ARM mbed project that will enable developers to create smart products with ARM-based industry-leading STM32 microcontrollers and accelerate the Internet of Things.
A look at the industry itself is interesting! The World Semiconductor Trade Statistics Inc. (WSTS) is forecasting the global semiconductor market to be $304 billion in 2013, up 4.4 percent from 2012.
The market is expected to recover throughout 2013, driven mainly by double digit growth of Memory product category. By region, all regions except Japan will grow from 2012. Japan market is forecasted to decline from 2012 in US dollar basis due to steep Japanese Yen depreciation compared to 2012.
WSTS estimates that the worldwide semiconductor market is predicted to grow further in 2014 and 2015. According to WSTS, the worldwide semiconductor market is forecasted to be up 4.1 percent to $317 billion in 2014, surpassing historical high of $300 billion registered in 2011. For 2015, it is forecasted to be $328 billion, up 3.4 percent.
All product categories and regions are forecasted to grow positively in each year, with the assumption of macro economy recovery throughout the forecast period. By end market, wireless and automotive are expected to grow faster than total market, while consumer and computer are assumed to remain stagnant.
Now, all of this remains to be seen!
Earlier, while speaking with Dr. Wally Rhines of Mentor, and Jaswinder Ahuja of Cadence, both emphasized the industry's move to 14/16nm. Xilinx estimates that 28nm will have a very long life. It shipped the 20nm device in early Nov. 2013.
In a 2013 survey, carried out by KPMG, applications markets identified as most important by at least 55 percent of the respondents: Mobile technology – 69 percent; Consumer – 66 percent; Computing – 63 percent; Alternative/Renewal Energy – 63 percent; Industrial – 62 percent; Automotive – 60 percent; Medical – 55 percent; Wireline Communications – 55 percent.
Do understand that there is always a line between hope and forecasts, and what the end result actually turns out to be! In the meantime, all of us continue to live in the hope that the global semiconductor will carry on flourishing in the years to come. As Brian Fuller, Cadence, says, 'the future's in our hands; let's not blow it!'
Apparently, there are huge expectations from certain segments such as the so-called Internet of Things (IoT) and wearable electronics, for instance. There will likely be focus on the connected car. Executives have been stating there could be third parties writing apps that can help cars. Intel expects that technology will be inspiring optimism for healthcare in future. As per a survey, 57 percent of people believe traditional hospitals will be obsolete in the future.
Qualcomm introduced the Snapdragon 410 chipset with integrated 4G LTE world mode for high-volume smartphones. STMicroelectronics has joined ARM mbed project that will enable developers to create smart products with ARM-based industry-leading STM32 microcontrollers and accelerate the Internet of Things.
A look at the industry itself is interesting! The World Semiconductor Trade Statistics Inc. (WSTS) is forecasting the global semiconductor market to be $304 billion in 2013, up 4.4 percent from 2012.
The market is expected to recover throughout 2013, driven mainly by double digit growth of Memory product category. By region, all regions except Japan will grow from 2012. Japan market is forecasted to decline from 2012 in US dollar basis due to steep Japanese Yen depreciation compared to 2012.
WSTS estimates that the worldwide semiconductor market is predicted to grow further in 2014 and 2015. According to WSTS, the worldwide semiconductor market is forecasted to be up 4.1 percent to $317 billion in 2014, surpassing historical high of $300 billion registered in 2011. For 2015, it is forecasted to be $328 billion, up 3.4 percent.
All product categories and regions are forecasted to grow positively in each year, with the assumption of macro economy recovery throughout the forecast period. By end market, wireless and automotive are expected to grow faster than total market, while consumer and computer are assumed to remain stagnant.
Now, all of this remains to be seen!
Earlier, while speaking with Dr. Wally Rhines of Mentor, and Jaswinder Ahuja of Cadence, both emphasized the industry's move to 14/16nm. Xilinx estimates that 28nm will have a very long life. It shipped the 20nm device in early Nov. 2013.
In a 2013 survey, carried out by KPMG, applications markets identified as most important by at least 55 percent of the respondents: Mobile technology – 69 percent; Consumer – 66 percent; Computing – 63 percent; Alternative/Renewal Energy – 63 percent; Industrial – 62 percent; Automotive – 60 percent; Medical – 55 percent; Wireline Communications – 55 percent.
Do understand that there is always a line between hope and forecasts, and what the end result actually turns out to be! In the meantime, all of us continue to live in the hope that the global semiconductor will carry on flourishing in the years to come. As Brian Fuller, Cadence, says, 'the future's in our hands; let's not blow it!'
Sunday, December 29, 2013
What does it take to create Silicon Valley!
I
was pointed out to a piece of news on TV, where a ruling chief minister
of an Indian state apparently announced that he could make a particular
state of India another Silicon Valley! Interesting!!
First, what’s the secret behind Silicon Valley? Well, I am not even qualified enough to state that! However, all I can say is: it is probably a desire to do something very different, and to make the world a better place – that’s possibly the biggest driver in all the entrepreneurs that have come to and out of Silicon Valley in the USA.
If you looked up Wikipedia, it says that the term Silicon Valley originally referred to the region’s large number of silicon chip innovators and manufacturers, but eventually, came to refer to all high-tech businesses in the area, and is now generally used as a metonym for the American high-technology sector.
So, where exactly is India’s high-tech sector? How many Indian state governments have even tried to foster such a sector? Ok, even if the state governments tried to foster, where are the entrepreneurs? Ok, an even easier one: how many school dropouts from India or even smal-time entrepreneurs have even made a foray into high-tech?
Right, so where are the silicon chip innovators from India? Sorry, I dd not even hear a word that you said? Can you speak out a little louder? It seems there are none! Rather, there has been very little to no development in India, barring the work that is done by the MNCs.

One friend told me that Bangalore is a place that can be Silicon Valley. Really? How?? With the presence of MNCs, he said! Well, Silicon Valley in the US does not have MNCs from other countries, are there? Let’s see! Some companies with bases in Silicon Valley, listed on Wikipedia, include Adobe, AMD, Apple, Applied Materials, Cisco, Facebook, Google, HP, Intel, Juniper, KLA-Tencor, LSI, Marvell, Maxim, Nvidia, SanDisk, Xilinx, etc.
Now, most of these firms have setups in Bangalore, but isn’t that part of the companies’ expansion plans? Also, I have emails and requests from a whole lot of youngsters asking me: ‘Sir, please advice me which company should I join?’ Very, very few have asked me: ‘Sir, I have this idea. Is it worth exploring?’
Let’s face the truth. We, as a nation, so far, have not been one to take up challenges and do something new. The ones who do, or are inclined to do so, are working in one of the many MNCs – either in India or overseas.
So, how many budding entrepreneurs are there in India, who are willing to take the risk and plunge into serious R&D?
It really takes a lot to even conceive a Silicon Valley. It takes people of great vision to build something of a Silicon Valley, and not the presence of MNCs.
Just look at Hsinchu, in Taiwan, or even Shenzhen, in China. Specifically, look up Shenzhen Hi-Tech Industrial Park and the Hsinchu Science Park to get some ideas.
First, what’s the secret behind Silicon Valley? Well, I am not even qualified enough to state that! However, all I can say is: it is probably a desire to do something very different, and to make the world a better place – that’s possibly the biggest driver in all the entrepreneurs that have come to and out of Silicon Valley in the USA.
If you looked up Wikipedia, it says that the term Silicon Valley originally referred to the region’s large number of silicon chip innovators and manufacturers, but eventually, came to refer to all high-tech businesses in the area, and is now generally used as a metonym for the American high-technology sector.
So, where exactly is India’s high-tech sector? How many Indian state governments have even tried to foster such a sector? Ok, even if the state governments tried to foster, where are the entrepreneurs? Ok, an even easier one: how many school dropouts from India or even smal-time entrepreneurs have even made a foray into high-tech?
Right, so where are the silicon chip innovators from India? Sorry, I dd not even hear a word that you said? Can you speak out a little louder? It seems there are none! Rather, there has been very little to no development in India, barring the work that is done by the MNCs.

One friend told me that Bangalore is a place that can be Silicon Valley. Really? How?? With the presence of MNCs, he said! Well, Silicon Valley in the US does not have MNCs from other countries, are there? Let’s see! Some companies with bases in Silicon Valley, listed on Wikipedia, include Adobe, AMD, Apple, Applied Materials, Cisco, Facebook, Google, HP, Intel, Juniper, KLA-Tencor, LSI, Marvell, Maxim, Nvidia, SanDisk, Xilinx, etc.
Now, most of these firms have setups in Bangalore, but isn’t that part of the companies’ expansion plans? Also, I have emails and requests from a whole lot of youngsters asking me: ‘Sir, please advice me which company should I join?’ Very, very few have asked me: ‘Sir, I have this idea. Is it worth exploring?’
Let’s face the truth. We, as a nation, so far, have not been one to take up challenges and do something new. The ones who do, or are inclined to do so, are working in one of the many MNCs – either in India or overseas.
So, how many budding entrepreneurs are there in India, who are willing to take the risk and plunge into serious R&D?
It really takes a lot to even conceive a Silicon Valley. It takes people of great vision to build something of a Silicon Valley, and not the presence of MNCs.
Just look at Hsinchu, in Taiwan, or even Shenzhen, in China. Specifically, look up Shenzhen Hi-Tech Industrial Park and the Hsinchu Science Park to get some ideas.
Sunday, December 22, 2013
How's the global semiconductor industry performing in sub-20nm era?
Early
this month, I hobbled along to catch up with Jaswnder Ahuja, corporate
VP and MD, Cadence Desiign Systems India. With the global semiconductor
industry having entered the sub-20nm era, there are a lot of things
happening, and Cadence is sure to be present.
First, let's see how's the global semiconductor industry performing after entering the sub-20nm era.
Ahuja replied: "Increased demand for faster, smaller, low-power chips continues to drive the geometry shrink as one of the ways to manage the low-power, higher performance goals in smaller form factors—in other words, PPA is driving the move to advanced node design.
"At Cadence, we are seeing a lot of interest in the wireless space, which includes smartphones, tablets, and consumer devices. In this market, you must support different standards, the device must be really fast, it must have Internet access, and all this must be done at lower power so the that it does not drain the battery. We’re also seeing interest for advanced nodes in other segments such as computing and graphics processors."
When speaking of advanced nodes, let's also try and find out what Cadence is doing in helping achieve 10X faster power integrity analysis and signoff.
Cadence Voltus IC power integrity Solution is a full-chip, cell-level power signoff tool that provides accurate, fast, and high-capacity analysis and optimization technologies to designers for debugging, verifying, and fixing IC chip power consumption, IR drop, and electromigration (EM) constraints and violations.
The Voltus solution includes innovative technologies such as massively parallel execution, hierarchical architecture, and physically aware power grid analysis and optimization. Beneficial as a standalone power signoff tool, Voltus IC Power Integrity Solution delivers even more significant productivity gains when used in a highly integrated flow with other key Cadence products, providing the industry’s fastest design closure technology.
Developed with advanced algorithms and a new power integrity analysis engine with massively parallel execution, Voltus IC Power Integrity Solution:
* Performs 10X faster than other solutions on the market.
* Supports very large designs—up to one billion instances—with its hierarchical architecture.
* Delivers SPICE-level accuracy.
* Enhances physical implementation quality via physically aware power integrity optimization.
Supported by major foundries and intellectual property (IP) providers, Voltus IC Power Integrity Solution has been validated and certified on advanced nodes processes such as 16nm FinFET and included in reference design flows such as for 3D-IC technology.
Backed by Cadence’s rigorous quality control and product release procedures, the Voltus solution delivers best-in-class signoff quality on accuracy and stability for all process nodes and design technologies.
FinFETs to 20nm - are folks benefiting?
It is common news that FinFETs have gone to 20nm and perhaps, lower. Therefore, are those folks looking for power reduction now benefiting?
Ahuja replied that FinFETs allow semiconductor and systems companies to continue to develop commercially viable chips for the mobile devices that are dominating the consumer market. FinFETs enable new generations of high-density, high-performance, and ultra-low-power systems on chip (SoCs) for future smart phones, tablets, and other advanced mobile devices. Anyone who adopts FinFET technology will reap the benefits.
Foundry support for FinFETs will begin at 16nm and 14nm. In April of this year, Cadence announced a collaboration with ARM to implement the industry’s first ARM Cortex-A57 processor on TSMC’s 16nm FinFET manufacturing process. At ARM TechCon 2012, Cadence announced a 14nm test chip tapeout using an ARM Cortex-M0 processor and IBM's FinFET process technology.
First, let's see how's the global semiconductor industry performing after entering the sub-20nm era.
Ahuja replied: "Increased demand for faster, smaller, low-power chips continues to drive the geometry shrink as one of the ways to manage the low-power, higher performance goals in smaller form factors—in other words, PPA is driving the move to advanced node design.
"At Cadence, we are seeing a lot of interest in the wireless space, which includes smartphones, tablets, and consumer devices. In this market, you must support different standards, the device must be really fast, it must have Internet access, and all this must be done at lower power so the that it does not drain the battery. We’re also seeing interest for advanced nodes in other segments such as computing and graphics processors."
When speaking of advanced nodes, let's also try and find out what Cadence is doing in helping achieve 10X faster power integrity analysis and signoff.
Cadence Voltus IC power integrity Solution is a full-chip, cell-level power signoff tool that provides accurate, fast, and high-capacity analysis and optimization technologies to designers for debugging, verifying, and fixing IC chip power consumption, IR drop, and electromigration (EM) constraints and violations.
The Voltus solution includes innovative technologies such as massively parallel execution, hierarchical architecture, and physically aware power grid analysis and optimization. Beneficial as a standalone power signoff tool, Voltus IC Power Integrity Solution delivers even more significant productivity gains when used in a highly integrated flow with other key Cadence products, providing the industry’s fastest design closure technology.
Developed with advanced algorithms and a new power integrity analysis engine with massively parallel execution, Voltus IC Power Integrity Solution:
* Performs 10X faster than other solutions on the market.
* Supports very large designs—up to one billion instances—with its hierarchical architecture.
* Delivers SPICE-level accuracy.
* Enhances physical implementation quality via physically aware power integrity optimization.
Supported by major foundries and intellectual property (IP) providers, Voltus IC Power Integrity Solution has been validated and certified on advanced nodes processes such as 16nm FinFET and included in reference design flows such as for 3D-IC technology.
Backed by Cadence’s rigorous quality control and product release procedures, the Voltus solution delivers best-in-class signoff quality on accuracy and stability for all process nodes and design technologies.
FinFETs to 20nm - are folks benefiting?
It is common news that FinFETs have gone to 20nm and perhaps, lower. Therefore, are those folks looking for power reduction now benefiting?
Ahuja replied that FinFETs allow semiconductor and systems companies to continue to develop commercially viable chips for the mobile devices that are dominating the consumer market. FinFETs enable new generations of high-density, high-performance, and ultra-low-power systems on chip (SoCs) for future smart phones, tablets, and other advanced mobile devices. Anyone who adopts FinFET technology will reap the benefits.
Foundry support for FinFETs will begin at 16nm and 14nm. In April of this year, Cadence announced a collaboration with ARM to implement the industry’s first ARM Cortex-A57 processor on TSMC’s 16nm FinFET manufacturing process. At ARM TechCon 2012, Cadence announced a 14nm test chip tapeout using an ARM Cortex-M0 processor and IBM's FinFET process technology.
Wednesday, December 11, 2013
Xilinx announces 20nm All Programmable UltraSCALE portfolio
Xilinx
Inc. has announced of its 20nm All Programmable UltraScale portfolio
with product documentation and Vivado Design Suite support.
Neeraj Varma, director-Sales, India, Xilinx, said: “We are enabling All Programmable and smarter systems. We are using smart IP. We are aligning to produce smarter systems. We are helping customers to differentiate their products faster.
“In future, we will go with concurrent nodes with FPGAs, SoCs and 3D ICs. As per our estimates, 28nm will have a very long life. We shipped the 20nm device in early Nov. 2013. It complements 28nm or new high-performance architectures. 16nm complements 20nm with FinFET, multiprocessing, memory.”
Strategy execution has kept Xilinx a generation ahead. As of Dec. 2013, its 20nm portfolio is available to customers. There are two major announcements from Xilinx.
* Xilinx 20nm All Programmable UltraScale portfolio now available with ASIC-class architecture and ASIC-strength design solution.
* Xiilinx doubles industry’s highest capacity device to 4.4 mn logic, delivering density adantage, a full generation ahead.
KINTEX UltraSCALE – XCKU035, 040, 060, 075, 100, 115.
VIRTEX UltraSCALE – XCVU065, 080, 095, 125, 145, 160.
There is a family migration path. There is scalability for derivative applications. You can leverage PCB investment across platforms. It is future-proof with migration path to 16nm. For making these happen, Xilinx is using the TSMC 20SoC.
Varma added, “We have increased the logic cells in Kintex and Virtex, and added 100G Ethenet blocks and 150G Interlaken blocks.”
The second announcement – highest density in FPGAs in industry. The XCVU440 is the largest in the industry by 4X, a full generation ahead, and uses 50M equivalent ASIC gates. Xilinx is delivering an ASIC-class advantage through silicon, tools and methodology.
There is UltraSCALE ASIC-class architecture, and ASIC-class capabilities. There is also the Vivado ASIC-strength design suite. UltraFAST is the design methodology. UltraSCALE will support networking, digital video and wireless.
Interconnect bottlenecks impede next generation performance.
* Routing delay dominates overall delay.
* Clock skew consumes more timing margin.
* Sub-optimal CLB packing reduces performance and utilization.
Varma added: “We have solved these issues – as UltraSCALE re-architects the core. There is 90 percent utilization now with maximum performance. We added next-generation routing, ASIC-like clocking – have clocks by segment, and logic cell packing.
“Block-level innovations optimize critical paths for massive bandwidth and processing. We are going to support DDR4, and there will be a lot more security features.”
The Vivado design suite accelerates productivity. Analytical placer solves the interconnect issue.
UltraSCALE apps include:
VIRTEX: 400G OTN switching, 400G transponder, 400G MAC-to-Interlaken bridge, 2x100G Muxponder, ASIC prototyping.
KINTEX: 4×4 mixed mode radio, 100G traffic manager NIC, super high-vision processing, 256-channel ultrasound, 48-channel T/R radar processing.
Neeraj Varma, director-Sales, India, Xilinx, said: “We are enabling All Programmable and smarter systems. We are using smart IP. We are aligning to produce smarter systems. We are helping customers to differentiate their products faster.
“In future, we will go with concurrent nodes with FPGAs, SoCs and 3D ICs. As per our estimates, 28nm will have a very long life. We shipped the 20nm device in early Nov. 2013. It complements 28nm or new high-performance architectures. 16nm complements 20nm with FinFET, multiprocessing, memory.”
Strategy execution has kept Xilinx a generation ahead. As of Dec. 2013, its 20nm portfolio is available to customers. There are two major announcements from Xilinx.
* Xilinx 20nm All Programmable UltraScale portfolio now available with ASIC-class architecture and ASIC-strength design solution.
* Xiilinx doubles industry’s highest capacity device to 4.4 mn logic, delivering density adantage, a full generation ahead.
KINTEX UltraSCALE – XCKU035, 040, 060, 075, 100, 115.
VIRTEX UltraSCALE – XCVU065, 080, 095, 125, 145, 160.
There is a family migration path. There is scalability for derivative applications. You can leverage PCB investment across platforms. It is future-proof with migration path to 16nm. For making these happen, Xilinx is using the TSMC 20SoC.
Varma added, “We have increased the logic cells in Kintex and Virtex, and added 100G Ethenet blocks and 150G Interlaken blocks.”
The second announcement – highest density in FPGAs in industry. The XCVU440 is the largest in the industry by 4X, a full generation ahead, and uses 50M equivalent ASIC gates. Xilinx is delivering an ASIC-class advantage through silicon, tools and methodology.
There is UltraSCALE ASIC-class architecture, and ASIC-class capabilities. There is also the Vivado ASIC-strength design suite. UltraFAST is the design methodology. UltraSCALE will support networking, digital video and wireless.
Interconnect bottlenecks impede next generation performance.
* Routing delay dominates overall delay.
* Clock skew consumes more timing margin.
* Sub-optimal CLB packing reduces performance and utilization.
Varma added: “We have solved these issues – as UltraSCALE re-architects the core. There is 90 percent utilization now with maximum performance. We added next-generation routing, ASIC-like clocking – have clocks by segment, and logic cell packing.
“Block-level innovations optimize critical paths for massive bandwidth and processing. We are going to support DDR4, and there will be a lot more security features.”
The Vivado design suite accelerates productivity. Analytical placer solves the interconnect issue.
UltraSCALE apps include:
VIRTEX: 400G OTN switching, 400G transponder, 400G MAC-to-Interlaken bridge, 2x100G Muxponder, ASIC prototyping.
KINTEX: 4×4 mixed mode radio, 100G traffic manager NIC, super high-vision processing, 256-channel ultrasound, 48-channel T/R radar processing.
Friday, December 6, 2013
Dr. Wally Rhines: Watch out 14/16nm technologies in 2014!
It
is always a pleasure speaking with Dr. Wally Rhines, chairman and CEO,
Mentor Graphics Corp. The last time I met him was at Santa Cruz, USA,
during a global electronics forum in April this year.Outlook for global semicon in 2014
Dr. Rhines said: "The outlook for the global semicon industry in 2014 is modestly positive. Most analysts will see single digiit growth. In memory, we have short supply vs. demand. While we had consolidation of the wireless industry, we still have volumes of handsets, tablets, etc. In the US, tablets are said to be the biggest growth area during Xmas.
"When you look at any product, you look at what more can it do. You look at more and more features that can be added. We have specialization in ARM-based chips. There are enough change dynamics that show demand.
"The iPad bridged the gap between the portable PC and phone. The infrastructure of apps has now made a huge infrastructure. If you are dependant on apps, there can be a differentiator.
"Wearable electronics is another great opportunity. However, it is still a small market. The electronic watch is interesting. We are in an era where there are some things that are key, and some require figuring out.
"There will be more and more need for specific devices, rather than only applications in future. The same thing was with the PC, which went from custom to specific needs."
In that case, how is the global semiconductor industry performing having entering the sub 20nm era?
He said that 2014 is going to be a big year. There will be releases of 14/16nm technologies. This will be the year when customers will be doing tests. There are companies in all regions of the world that will be doing such stuff.
Have FinFETs gone to 20nm? Are those looking for power reduction now benefiting?
Dr. Rhines said: "The big advantage is leakage. FinFET dramatically impacts current leakage. Now, attention will shift to dynamic power. It will once again be predominantly the consumer of power in large chips."
Outlook for EDA
Now, let's see what's the outlook for the global EDA industry in 2014.
Dr. Rhines said: "Whenever you create new technologies, you will need EDA. So, EDA will grow. New designs will also need EDA. There will be new EDA tools. EDA is now addressing thermal and stress issues in verification and design. Caliber PERC is our main product here. The upgrades are good for EDA. There are new things they have to adopt, in these tools.
Let's talk about embedded. Mentor released the new version of Sourcery CodeBench. What does it stand to gain?
Raghu Panicker, sales director, Mentor Graphics India said the Sourcery CodeBench is a real-time operating system (RTOS). That product is gaining momentum. Large MNC customers like Qualcomm are adopting this. Among small firms, there are medical, energy meter companies that are handling it as well.
Dr. Rhines added that Sorcery CodeBench is indicative of a trend - it is very open source based. It is now 20,000 downloads a month, so that is a big community.
Next is there any scope for the growth of biomems and optical telecom industry?
He said that both areas are interesting. Biomems are still a fairly small market. It is going to be evolutionary. As for optical telecom, over the last year or two, all participants have gone into a silent mode. Mentor is working with a number of customers.
Five trends to rule in 2014
Now, it was quiz time. First, the top five trends in the EDA industry during 2014. Dr. Rhines said:
* Growth of emulation for verification. The market is growing at over CAGR of 25 percent. Emulation is really big. It will be a big game changer for EDA.
* 16/14nm.
* Continued pressure on power as we go to FinFETs.
* Power reduction.
* Yield analysis for 14/16nm. A near range can be security.
Now, the top five trends for semiconductors in 2014! Dr. Rhines mentioned these as:
* Move to 14/16nm and cost.
* Growth in hybrid functions is another trend.
* Basic IoT.
* Security - how you verify designs.
* Continued commoditization of wireless applications.
Wednesday, December 4, 2013
Outlook 2014: Xilinx bets big on 28nm
We
are in December, and its time for outlook 2014! First, I met up with
Neeraj Varma, director-Sales, India, Xilinx. He said: "We expect the
28nm to do really well. From Apr. 13-Mar. 14, we expect revenues worth
$250 milion from the 28nm line.
"We are now looking at the embedded market - and expect about $2 billion serviceable available market (SAM). We are looking at $8 billion SAM at the ASIC/ASSP displacement market, and of course $6 billion SAM for core PLD."
After a long time, Xilinx has been seeing positive capex. "We are entering a growth cycle for service providers and enterprises," he added.
A macro view of capex equipment spend is driven by LTE 27.2 percent at 2011-16, and optical networks 15.9 percent. The other areas include data center, enterprise switching and routing, and service provider switching and routing. Next, 3D ICs will enable Nx100G OTN, 400G OTN, MuxSAR, as well as top of the rack switch, I/O virtualization
Earlier, there were less than 50 ASICs start in communications in the top 10 OEMs. There were less than 20 28nm ASIC starts in at top 10 OEMs. As of 2012, less than 50 percent of the top 16 ASSPs vendors were losing money.
Customer needs are diverse now. Companies end up over designing a chip. People end up paying for what trey are not using.
Xilinx is offering the SMARTCORE IP for smarter networks and data centers. "40 percent of our wins have been achieved by integrating or displacing ASICs and ASSPs," he said. "We have 25 percent total wins across a broad set of apps/portfolio."
Some other gains for Xilinx:
* Xilinx gained 3 percent increase in PLDs.
* In wired and data centers, it has 12-percent CAGR from 2013-16.
* In wireless, it has 10-12 percent CAGR.
* In automotive smarter vision, it has 20 percent CAGR growth.
* In industrial, scientific and medical (ISM), it has 12 percent CAGR growth.
* In FY13E-FY16E, Xilinx expects to grow 8-12 percent, and has plans to increase the R&D revenue to 8.6 percent.
"We are now looking at the embedded market - and expect about $2 billion serviceable available market (SAM). We are looking at $8 billion SAM at the ASIC/ASSP displacement market, and of course $6 billion SAM for core PLD."
After a long time, Xilinx has been seeing positive capex. "We are entering a growth cycle for service providers and enterprises," he added.
A macro view of capex equipment spend is driven by LTE 27.2 percent at 2011-16, and optical networks 15.9 percent. The other areas include data center, enterprise switching and routing, and service provider switching and routing. Next, 3D ICs will enable Nx100G OTN, 400G OTN, MuxSAR, as well as top of the rack switch, I/O virtualization
Earlier, there were less than 50 ASICs start in communications in the top 10 OEMs. There were less than 20 28nm ASIC starts in at top 10 OEMs. As of 2012, less than 50 percent of the top 16 ASSPs vendors were losing money.
Customer needs are diverse now. Companies end up over designing a chip. People end up paying for what trey are not using.
Xilinx is offering the SMARTCORE IP for smarter networks and data centers. "40 percent of our wins have been achieved by integrating or displacing ASICs and ASSPs," he said. "We have 25 percent total wins across a broad set of apps/portfolio."
Some other gains for Xilinx:
* Xilinx gained 3 percent increase in PLDs.
* In wired and data centers, it has 12-percent CAGR from 2013-16.
* In wireless, it has 10-12 percent CAGR.
* In automotive smarter vision, it has 20 percent CAGR growth.
* In industrial, scientific and medical (ISM), it has 12 percent CAGR growth.
* In FY13E-FY16E, Xilinx expects to grow 8-12 percent, and has plans to increase the R&D revenue to 8.6 percent.
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