Yield management, DFM in the Indian context

There is a lack of satisfactory match that needs to be overcome for India to go up in the semiconductor value chain. This should be overcome by training, adopting new methodologies/tools and taking care of it from the beginning in the design phase, according to S. Uma Mahesh, co-founder CEO of Indrion Technologies, in this discussion on yield management and DFM in the Indian context.

It is said that design for manufacturing (DFM) means design for money and design for profitability. What are designers doing about maintaining these? Most importantly, are the designers conscious of yield. According to Uma Mahesh, it is not as much as they should! It is still not mapped to technical parameters. That is, what if they do will effect the yield to what extent!

On DFM, essentially, it implies that design takes care of effects of manufacturing, by factoring for it in all phases of design -- beginning with architecture. This is done in terms of design margins, matching the projected performance numbers to those achieved.

This requires designers to factor for it, primarily the cross talk, electro migration, signal 'bouncing', etc., by planning for the power bus, clock bus architecture, their widths. And similarly, at the frontend level, by planning for the margins in timings, clock skews and latencies.

Teams are increasingly planning for these from different stages of front-end design and also in the physical design planning and later, by using tools that are actually aware of the DFM, SI effects, respectively.

Are designers as conscious of yield as they should be? If not, why and what should they do to improve? To this, it had more to do with 'realizing the importance of design decisions on yield'. DFY, DFM, etc., are new developments, that are of higher importance for some designs over other -- for example, for high frequency, high performance, lower geometry designs. More importance should be give to these aspects by companies when they train their engineers.

Companies should try to incorporate these aspects in training and inculcate the importance of these to the engineers, explaining the importance of these factors to the products they develop. In short, more education of the factors are required.

Is the yield accurately mapping into the technical parameters that would ultimately lead to higher tapeout percentage? What are the challenges and how can those be overcome? This was not yet happening for the reasons below.

The essential tools are in the process of becoming part of the design process and they do a good job. However, this is still an evolving space, and hence, lots of opportunity for EDA tool companies, startups, as can be noticed in the industry activity globally.