Right then, folks! This is my last post for 2010, on my favorite topic - semiconductors. If 2009 was one of the worst, if not, the worst year ever for semiconductors, 2010 seems to be the best year for this industry, what with the analyst community forecasting that the global semicon industry will surpass the $300 billion mark for the first time in its history!
Well, here's a look at the good, the bad and the ugly, if available for otherwise what has been an excellent year, which is in its last hours, for semiconductors. Presenting a list of posts on semiconductors that mattered in 2010.
Top semiconductor and EDA trends to watch out for in 2010!
Delivering 10X design improvements: Dr. Walden C. Rhines, Mentor Graphics @ VLSID 2010
Future research directions in EDA: Dr. Prith Banerjee @ VLSID 2010 -- This was quite an entertaining presentation!
Global semicon industry on rapid recovery curve: Dr. Wally Rhines
Indian semicon industry: Time for paradigm shift! -- When will that shift actually happen?
Qualcomm, AMD head top 25 fabless IC suppliers for 2009; Taiwan firms finish strong!
TSMC leads 2009 foundry rankings; GlobalFoundries top challenger!
ISA Vision Summit 2010: Saankhya Labs, Cosmic Circuits are Indian start-ups to watch at Technovation 2010!
ISA Vision Summit 2010: Karnataka Semicon Policy 2010 unveiled; great opportunity for India to show we mean business! -- So far, the Karnataka semicon policy has flattered to deceive! I'm not surprised, though!
Dongbu HiTek comes India calling! Raises hopes for foundry services!!
Indian electronics and semiconductor industries: Time to answer tough questions and find solutions -- Reminds me of the popular song from U2 titled -- "I still haven't found what I'm looking for"!
What should the Indian semicon/electronics industry do now? -- Seriously, easy to say, difficult to manage (ESDM)! ;)
Flash will be bigger than you ever imagined in the coming decade: Dr. Eli Harari, SanDisk CEO.
Currently profitable global semicon industry needs to remember lessons of downturn!
FPGA and MPU trends: Intelligent mixed-signal FPGA to be part of Xilinx’s TDP strategy
Semicon rankings 2009: Global revenue dips, but did anyone tell that to Apac suppliers?
Did you know that the Indian semicon policy had expired and now requires an extension? -- As they say, 'It happens only in India!'
What’s happening with the global semiconductor industry?
Semiconductor-IP directory for FPGAs indexes over 17,000 IP blocks and FPGA devices!
EDA360 to help integrators close profitability gap!
EDA360 unplugged with Cadence’s Jaswinder Ahuja.
Thrive or survive…going for gold in post-recession recovery: Malcolm Penn @ IEF2010, Dresden.
GlobalFoundries enabling the next wave of ‘foundry’ innovation.
What’s new with Mentor’s PADS 9.2?
TSMC enables business growth through effective and collaborative innovation.
Indian Microelectronics Academy (IMA) formed to build, nurture and grow start-ups!
Ten commandments of effective standards!
Indian industry proposes to extend deadline of India’s semicon policy up to March 2015!
What needs to be done to build an Indian electronics ecosystem!
Indian semicon market grows 15.6 percent in 2009, but don’t rejoice yet!
Synopsys’ Dr. Aart de Geus at SNUG 2010 India!
Analog and MCUs stand out: Dr. Bobby Mitra, TI.
Compound semiconductors substrates market to reach $1bn by 2010.
iSuppli raises 2010 foundry forecast; interesting lessons to learn for India from China’s story!
VDAT 2010: Real, but ‘different’ opportunity in emerging markets — Jaswinder Ahuja, Cadence.
VDAT 2010: Encourage Indian students to come up with product ideas and specs.
Global semicon market set for slowdown due to deteriorating business climate!
Intel’s McAfee buy: Too few answers to too many questions, for now! -- A surprising, but interesting acquisition!
ON Semiconductor aims to lead in energy efficiency solutions.
Where are the MEMS markets going?
NXP driving automotive electronics toward energy efficiency.
What’s the way forward for Indian semicon/ESDM industry?
Actel’s ‘smart fusion’ with Microsemi a top draw!
Why has the semicon equipment bubble really burst? – I -- Insightful, indeed!
Why has the semicon equipment bubble really burst? – II
Is global semicon inventory level headed for oversupply in Q3?
Semicon industry witnessing inventory corrections vs. industry decline!
Intel opens manufacturing doors to Achronix! Becomes mini foundry? -- Another very interesting move by Intel!
India’s teaching community contemplates SoC design.
15 queries on how semicon/VLSI firms associate with social media!
Is social media really helping semicon/VLSI firms? -- Is it, really?
Semicon industry must be prepared to face challenges in new era: Lip-Bu Tan
Design-Lite — new model for semiconductor development: Taher Madraswala
Creating commercial IP in academic community.
Is enough being done for Indian industry-academia collaboration in VLSI education? -- Is it, really?
Is the Indian semicon industry losing the plot? -- Looks like it is, for the moment!
Women power, RVCE rule at first annual Karnataka VLSI and embedded systems awards.
EDA and emerging system design challenges: Dr. Wally Rhines
UCLA researchers to develop non-volatile logic technology.
Local know-how, innovation (Jugaad) key to realizing semicon/electronics growth in India.
Mentor's Wally Rhines on global EDA industry challenges - I
Mentor's Wally Rhines on global EDA industry challenges - II
Top 20 global semicon suppliers of 2010.
Need to develop robust Indian semicon industry, led by local companies!
More ‘fabless IC billionaires’ in 2010, says IC Insights! Is India listening?
Phew! What a list!! The Indian semiconductor industry definitely needs a better year than this one, along with a clear goal/roadmap ahead.
That's it from me, for the year, my dear friends! Hope to see you around next year!
Here's wishing everyone a very happy, joyous and prosperous 2011! :)
Friday, December 31, 2010
Thursday, December 30, 2010
Top 10 trends in electronics and telecom industry in 2011!
Here are the top 10 trends in electronics and telecom for the year 2011.
Each one of the trends have been taken from the existing posts, and they seem to be going full blast ahead in 2011. First, the top trends in electronics.
1. More tablets and portable electronics devices should make an appearance.
2. 3D TV without glasses should be talk of the town. 3D TV should enter the family in 2011.
3. Penetration rate of LED TV to accelerate.
4. Further improvements in digital TV connectivity — Silicon Image’s ViaPort technology needs to be watched.
5. Fully IP-connected digital TV platform — Inview and Trident Microsystems announced Neelix.
6. Plethora of new DisplayLink certified devices hit the market.
7. E-readers will grow, but at the risk of getting commoditized.
8. There will be more of SSDs.
Now, to the top trends in telecom for 2011. Again, these are likely to make the top news in the coming year. Presenting the top telecom industry trends for 20111.
1. There will be much more of the connected devices.
2. Naturally, there will be more mobile phone applications!
3. Bluetooth will emerge as a wireless standard for smart energy.
4. There will be much more traction for TD-LTE! So, where does it leave WiMAX?
5. Femtocells — well, see more of it in the coming year.
6. Now, look out for in-car Wi-Fi.
Happy new year to my friends and well wishers. ;)
Each one of the trends have been taken from the existing posts, and they seem to be going full blast ahead in 2011. First, the top trends in electronics.
1. More tablets and portable electronics devices should make an appearance.
2. 3D TV without glasses should be talk of the town. 3D TV should enter the family in 2011.
3. Penetration rate of LED TV to accelerate.
4. Further improvements in digital TV connectivity — Silicon Image’s ViaPort technology needs to be watched.
5. Fully IP-connected digital TV platform — Inview and Trident Microsystems announced Neelix.
6. Plethora of new DisplayLink certified devices hit the market.
7. E-readers will grow, but at the risk of getting commoditized.
8. There will be more of SSDs.
Now, to the top trends in telecom for 2011. Again, these are likely to make the top news in the coming year. Presenting the top telecom industry trends for 20111.
1. There will be much more of the connected devices.
2. Naturally, there will be more mobile phone applications!
3. Bluetooth will emerge as a wireless standard for smart energy.
4. There will be much more traction for TD-LTE! So, where does it leave WiMAX?
5. Femtocells — well, see more of it in the coming year.
6. Now, look out for in-car Wi-Fi.
Happy new year to my friends and well wishers. ;)
Round-up 2010: Best of solar photovoltaics
Solar photovoltaics constantly reminds me of the early days of the telecom industry. Perhaps, the similarity lies in practically anyone and everyone wants to enter the solar/PV industry as well, just like it happened in telecom -- before the industry consolidation started to happen.
In India, a lot more talk has happened since the Jawaharlal Nehru National Solar Mission (JN-NSM) was unveiled.
With 2010 now drawing to an end, here's presenting the top posts for solar PV from the year that is about to leave all of us!
Want to enter solar off-grid business? Build your own solar LED lanterns and emergency lights! -- This was a smashing superhit! So many folks have accessed this post and quite a few commented! Definitely, my no. 1 post for the year and among my top 10 posts for 2010!
Union budget 2010: Solar, UIDs all the way!
NI DAQ workshop: Sun tracker suitable for Indian (and global) solar/PV industry
India to miss NSM target? No, it’s likely a mistake (in reporting)! -- The faux pas of the year! ;)
SEMI India benchmarks India’s NSM on global FIT best practices -- Goes on to show why SEMI continues to be a top notch industry association!
RoseStreet Labs develops breakthrough multiband solar cell technology! -- I enjoyed writing this post a lot!
Solar PV heats up in India — NVVN signs MoU with 16 developers; new guidelines for solar projects -- First clear signs that India is indeed hot, as a solar market.
Unique solution required for grid-tie inverters in India!
Solarcon India 2010: Timely implementation of phase 1 critical to success of JN-NSM
Need to develop indigenous manufacturing capacity in solar: Deepak Gupta
Is there a case for polysilicon manufacturing in India?
India has bright future in solar PV, other RE: Stan Meyers, SEMI
Pressing need to address solar project financing in India: D. Majumdar, IREDA
TÜV Rheinland opens South Asia’s largest PV testing lab in Bangalore
Need to look at smart grid standards from an Indian context: Venkat Rajaraman, Su-Kam
Bluetooth set as short range wireless standard for smart energy! -- This should be interesting, as and when it happens!
Top 15 producers of c-Si and thin film solar PV modules, and outlook 2011.
That's it!
There's more to come in the new year, now that NVVN has released a list of projects under the JN-NSM. I am more keen to see how JN-NSM takes off in the new year, and am sure, so are you!
I am actually more keen to see how JN-NSM takes off in the new year.
Here's wishing everyone a very happy, joyous and prosperous 2011! :)
In India, a lot more talk has happened since the Jawaharlal Nehru National Solar Mission (JN-NSM) was unveiled.
With 2010 now drawing to an end, here's presenting the top posts for solar PV from the year that is about to leave all of us!
Want to enter solar off-grid business? Build your own solar LED lanterns and emergency lights! -- This was a smashing superhit! So many folks have accessed this post and quite a few commented! Definitely, my no. 1 post for the year and among my top 10 posts for 2010!
Union budget 2010: Solar, UIDs all the way!
NI DAQ workshop: Sun tracker suitable for Indian (and global) solar/PV industry
India to miss NSM target? No, it’s likely a mistake (in reporting)! -- The faux pas of the year! ;)
SEMI India benchmarks India’s NSM on global FIT best practices -- Goes on to show why SEMI continues to be a top notch industry association!
RoseStreet Labs develops breakthrough multiband solar cell technology! -- I enjoyed writing this post a lot!
Solar PV heats up in India — NVVN signs MoU with 16 developers; new guidelines for solar projects -- First clear signs that India is indeed hot, as a solar market.
Unique solution required for grid-tie inverters in India!
Solarcon India 2010: Timely implementation of phase 1 critical to success of JN-NSM
Need to develop indigenous manufacturing capacity in solar: Deepak Gupta
Is there a case for polysilicon manufacturing in India?
India has bright future in solar PV, other RE: Stan Meyers, SEMI
Pressing need to address solar project financing in India: D. Majumdar, IREDA
TÜV Rheinland opens South Asia’s largest PV testing lab in Bangalore
Need to look at smart grid standards from an Indian context: Venkat Rajaraman, Su-Kam
Bluetooth set as short range wireless standard for smart energy! -- This should be interesting, as and when it happens!
Top 15 producers of c-Si and thin film solar PV modules, and outlook 2011.
That's it!
There's more to come in the new year, now that NVVN has released a list of projects under the JN-NSM. I am more keen to see how JN-NSM takes off in the new year, and am sure, so are you!
I am actually more keen to see how JN-NSM takes off in the new year.
Here's wishing everyone a very happy, joyous and prosperous 2011! :)
Tuesday, December 28, 2010
Round-up 2010: Best of electronics, telecom and technology
Year 2010 has been a good year for the global electronics industry, rather, the technology industry, coming right after a couple of years of recession. Well, it is time to look back on 2010 and see the good, bad and ugly sides, if any, of electronics, telecom and technology.
Presenting my list of top posts for 2010 from these three segments.
ELECTRONICS
Electronics for energy efficient powertrain
Photonics rocks in India @ APW 2010, Cochin!
Plastic Logic’s QUE proReader looks to mean business!
Growing Indian power electronics market provides host of opportunities
Philips focuses on how interoperability, content sharing drive CE devices!
Apple never ceases to amaze!
Is this a war of tablets, or Apple OS vs. Google Android?
India needs to become major hardware player!
Roundup of day 2 @ Electronica India 2010
Strategic roadmap for electronics enabling energy efficient usage: Venkat Rajaraman, Su-Kam
NI stresses on innovation, launches LabVIEW 2010!
What’s Farnell (element14) up to? And, semicon equipment bubble burst? Whoa!!
Bluetooth set as short range wireless standard for smart energy!
View 3D TV, without glasses, today!
Indian medical electronics equipment industry to grow at 17 percent CAGR over next five years: ISA
Top 10 electronics industry trends for 2011
TELECOMMUNICATIONS
LTE will see larger deployments, higher volumes than WiMAX!
LTE should benefit from WiMAX beachhead!
Context-aware traffic mediation software could help telcos manage data tsunami: Openwave
Mobile WiMAX deployment and migration/upgrade strategies
Upgrade to WiMAX 2 uncertain as TD-LTE gains in momentum!
Tejas celebrates 10 years with new products for 3G/BWA backhaul
Focus on gyroscopes for mobile phone apps: Yole
Bluetooth low energy should contribute to WSN via remote monitoring
INSIDE Contactless unveils SecuRead NFC solution for mobile handset market
How are femtocells enhancing CDMA networks?
Top 10 telecom industry trends for 2011
TECHNOLOGY
Symantec’s Internet threat security report on India has few surprises!
Epic — first ever web browser for India, from India!
Norton cybercrime report: Time to take back your Internet from cybercriminals!
NComputing bets big on desktop virtualization
Brocade launches VDX switches for virtualized, cloud-optimized data centers
Yes, I agree that there aren't that many posts for electronics and telecom, and even technology! Will try to rectify this in 2011, although it isn't an easy job tracking so many different segments! :)
Best wishes for a very, very happy and prosperous 2011! :)
Presenting my list of top posts for 2010 from these three segments.
ELECTRONICS
Electronics for energy efficient powertrain
Photonics rocks in India @ APW 2010, Cochin!
Plastic Logic’s QUE proReader looks to mean business!
Growing Indian power electronics market provides host of opportunities
Philips focuses on how interoperability, content sharing drive CE devices!
Apple never ceases to amaze!
Is this a war of tablets, or Apple OS vs. Google Android?
India needs to become major hardware player!
Roundup of day 2 @ Electronica India 2010
Strategic roadmap for electronics enabling energy efficient usage: Venkat Rajaraman, Su-Kam
NI stresses on innovation, launches LabVIEW 2010!
What’s Farnell (element14) up to? And, semicon equipment bubble burst? Whoa!!
Bluetooth set as short range wireless standard for smart energy!
View 3D TV, without glasses, today!
Indian medical electronics equipment industry to grow at 17 percent CAGR over next five years: ISA
Top 10 electronics industry trends for 2011
TELECOMMUNICATIONS
LTE will see larger deployments, higher volumes than WiMAX!
LTE should benefit from WiMAX beachhead!
Context-aware traffic mediation software could help telcos manage data tsunami: Openwave
Mobile WiMAX deployment and migration/upgrade strategies
Upgrade to WiMAX 2 uncertain as TD-LTE gains in momentum!
Tejas celebrates 10 years with new products for 3G/BWA backhaul
Focus on gyroscopes for mobile phone apps: Yole
Bluetooth low energy should contribute to WSN via remote monitoring
INSIDE Contactless unveils SecuRead NFC solution for mobile handset market
How are femtocells enhancing CDMA networks?
Top 10 telecom industry trends for 2011
TECHNOLOGY
Symantec’s Internet threat security report on India has few surprises!
Epic — first ever web browser for India, from India!
Norton cybercrime report: Time to take back your Internet from cybercriminals!
NComputing bets big on desktop virtualization
Brocade launches VDX switches for virtualized, cloud-optimized data centers
Yes, I agree that there aren't that many posts for electronics and telecom, and even technology! Will try to rectify this in 2011, although it isn't an easy job tracking so many different segments! :)
Best wishes for a very, very happy and prosperous 2011! :)
Thursday, December 23, 2010
More 'fabless IC billionaires' in 2010, says IC Insights! Is India listening?
Brilliant! There's no other word to describe the first part of this headline!
As per IC Insights' forecast of 2010 billion-dollar fabless IC suppliers, excerpted from a ranking of top 50 fabless IC suppliers in its ' 2011 edition of The McClean Report, as many as 13 fabless IC suppliers are tipped to cross the $1-billion mark in sales in 2010!
As per IC Insights, this is a significant step up from 10 companies in 2009 and eight in 2008.
Source: IC Insight, USA.
Just sit back and admire this table. There are nine firms from the US -- Qualcomm, Broadcom, AMD, Marvell, Nvidia, Xilinx, Altera, LSI and Avago, three from Taiwan -- MediaTek, Novatek and MStar, while ST-Ericsson is Europe's lone representation in this stellar list.
In this august club of IC billionaires, no surprises, but Qualcomm retains the top place for the third consecutive year. Broadcom moves up a place. AMD should become the world's third largest player.
Broadcom at 53 percent, Marvell at 34 percent, Xilinx at 39 percent, Altera at 63 percent, Avago and Novatek at 40 percent each are top performers. However, MStar of Taiwan steals the show with an estimated 75 percent growth in 2010.
Qualcomm, Nvidia and LSI have performed well, especially the last two - coming pff a difficult 2009. Taiwan's MediaTek has seen the biggest slip -- down to 3 percent in 2010 from 22 percent in 2009.
There is no representation from Japan in the fabless IC billionaires club. IC Insights has indicated that the fabless/foundry hasn't caught on in Japan and is unlikely to do so in the near future. However, Taiwan and China based firms should sooner or later find their way into this club.
I will now come to India!
Where is India in all of this?
I am among those many 'few' who say India's semiconductor industry is doing great. Yes, indeed, it is doing great -- courtesy, the presence of the Indian arms of these fabless IC billionaires.
However, there is no Indian representation in this list of fabless IC billionaires! Will there ever be one? Only if the fabless model is seriously pursued in our country! That is, if the powers that be think this to be of any importance at all!!
Some years ago, there was this debate of fabs vs. fabless in India! While discussions about 'fabs' are dead and buried, there are hardly any discussions regarding fabless. However, there are several talks about re-igniting the Indian electronics industry and adopting a "Made-in-India, Made-for-India" mantra.
Now, all of this makes great reading! Please ask these questions of yourself: who are the chip providers going to be for all of these great electronics products that will be built in India? Who all will provide the necessary IP and other building blocks? From where are the necessary components going to be sourced?
If most or all of these still continue to be provided by the MNCs, then who is benefitting in the end? Definitely not India and the Indian semiconductor industry! MNCs will continue to grow their markets in India, which is why they enter markets in the first place! So, where are the Indian companies? Where exactly is India in all of this?
All this talk about ESDM simply won't help in the long run if it is not even helping develop, nurture and grow a robust local semiconductor industry.
The mantra of the Indian semicon industry should be 'Made in India and Made for India by Indian companies'! Unless this happens, one wonders how will the local industry ever grow!
So, will these issues ever be addressed? Or, will others continue to point out -- 'Keep dreaming! There won't ever be an Indian company in the global fabless iC suppliers list!'
The forthcoming ISA Vision Summit 2011 is a great opportunity to address these issues. Are you listening, ISA and the Indian semiconductor industry?
As per IC Insights' forecast of 2010 billion-dollar fabless IC suppliers, excerpted from a ranking of top 50 fabless IC suppliers in its ' 2011 edition of The McClean Report, as many as 13 fabless IC suppliers are tipped to cross the $1-billion mark in sales in 2010!
As per IC Insights, this is a significant step up from 10 companies in 2009 and eight in 2008.
Source: IC Insight, USA.Just sit back and admire this table. There are nine firms from the US -- Qualcomm, Broadcom, AMD, Marvell, Nvidia, Xilinx, Altera, LSI and Avago, three from Taiwan -- MediaTek, Novatek and MStar, while ST-Ericsson is Europe's lone representation in this stellar list.
In this august club of IC billionaires, no surprises, but Qualcomm retains the top place for the third consecutive year. Broadcom moves up a place. AMD should become the world's third largest player.
Broadcom at 53 percent, Marvell at 34 percent, Xilinx at 39 percent, Altera at 63 percent, Avago and Novatek at 40 percent each are top performers. However, MStar of Taiwan steals the show with an estimated 75 percent growth in 2010.
Qualcomm, Nvidia and LSI have performed well, especially the last two - coming pff a difficult 2009. Taiwan's MediaTek has seen the biggest slip -- down to 3 percent in 2010 from 22 percent in 2009.
There is no representation from Japan in the fabless IC billionaires club. IC Insights has indicated that the fabless/foundry hasn't caught on in Japan and is unlikely to do so in the near future. However, Taiwan and China based firms should sooner or later find their way into this club.
I will now come to India!
Where is India in all of this?
I am among those many 'few' who say India's semiconductor industry is doing great. Yes, indeed, it is doing great -- courtesy, the presence of the Indian arms of these fabless IC billionaires.
However, there is no Indian representation in this list of fabless IC billionaires! Will there ever be one? Only if the fabless model is seriously pursued in our country! That is, if the powers that be think this to be of any importance at all!!
Some years ago, there was this debate of fabs vs. fabless in India! While discussions about 'fabs' are dead and buried, there are hardly any discussions regarding fabless. However, there are several talks about re-igniting the Indian electronics industry and adopting a "Made-in-India, Made-for-India" mantra.
Now, all of this makes great reading! Please ask these questions of yourself: who are the chip providers going to be for all of these great electronics products that will be built in India? Who all will provide the necessary IP and other building blocks? From where are the necessary components going to be sourced?
If most or all of these still continue to be provided by the MNCs, then who is benefitting in the end? Definitely not India and the Indian semiconductor industry! MNCs will continue to grow their markets in India, which is why they enter markets in the first place! So, where are the Indian companies? Where exactly is India in all of this?
All this talk about ESDM simply won't help in the long run if it is not even helping develop, nurture and grow a robust local semiconductor industry.
The mantra of the Indian semicon industry should be 'Made in India and Made for India by Indian companies'! Unless this happens, one wonders how will the local industry ever grow!
So, will these issues ever be addressed? Or, will others continue to point out -- 'Keep dreaming! There won't ever be an Indian company in the global fabless iC suppliers list!'
The forthcoming ISA Vision Summit 2011 is a great opportunity to address these issues. Are you listening, ISA and the Indian semiconductor industry?
Tuesday, December 21, 2010
Top 15 producers of c-Si and thin film solar PV modules, and outlook 2011
I am extremely grateful to Stefan de Haan, senior analyst, Photovoltaics, iSuppli Corp., for sharing with me the top 15 global producers of c-Si and thin film solar photovoltaic (PV) modules, respectively during Q3 2010.
First, the top 15 global crystalline module producers (see Fig. 1) — who are the standout performers and why?
Source: iSuppli, USA.
He said: “It is still the Chinese integrated suppliers, above all Trina and Yingli. They benefit from a highly competitive cost structure. However, this need not be the most successful business model in future. With increasing cell and module efficiencies, and an increasing need for full automization, European and Japanese companies may gain ground again.”
Now, on to the top 15 global thin film module producers (see Fig. 2)– who are the standout performers here!
Source: iSuppli, USA.
de Haan added: “Still, it is First Solar, the company with lowest production cost in the industry and the biggest module producer. CIGS is upcoming, in particular. Solar Frontier also has to be watched.”
Global PV installations to grow significantly in 2011
It is said that global PV installation will likely witness moderate growth in 2011, and that, concerns of oversupply remain. de Haan agrees only partly.
He said: “Global PV installations will again grow significantly in 2011 (2010: 16 GW and 2011: 22.2 GW). Oversupply will not be dramatic in 2011, but in 2012 and 2013.”
Further, if the pressure from decreasing solar cell price continues to increase, will solar cell makers be forced to reduce prices of wafers and poly-Si to reflect costs? According to Stefan de Haan, prices will drop across the entire solar value chain in 2011!
First, the top 15 global crystalline module producers (see Fig. 1) — who are the standout performers and why?
Source: iSuppli, USA.He said: “It is still the Chinese integrated suppliers, above all Trina and Yingli. They benefit from a highly competitive cost structure. However, this need not be the most successful business model in future. With increasing cell and module efficiencies, and an increasing need for full automization, European and Japanese companies may gain ground again.”
Now, on to the top 15 global thin film module producers (see Fig. 2)– who are the standout performers here!
Source: iSuppli, USA.de Haan added: “Still, it is First Solar, the company with lowest production cost in the industry and the biggest module producer. CIGS is upcoming, in particular. Solar Frontier also has to be watched.”
Global PV installations to grow significantly in 2011
It is said that global PV installation will likely witness moderate growth in 2011, and that, concerns of oversupply remain. de Haan agrees only partly.
He said: “Global PV installations will again grow significantly in 2011 (2010: 16 GW and 2011: 22.2 GW). Oversupply will not be dramatic in 2011, but in 2012 and 2013.”
Further, if the pressure from decreasing solar cell price continues to increase, will solar cell makers be forced to reduce prices of wafers and poly-Si to reflect costs? According to Stefan de Haan, prices will drop across the entire solar value chain in 2011!
Saturday, December 18, 2010
Need to develop robust Indian semicon industry, led by local companies!
I came across an article titled “Global Semiconductor Companies Turn to India for Growth” published on India Knowledge@Wharton. Isn’t this reason why global semiconductor companies enter a specific market in the first place — to grow their own markets and regions? So, why should it be different with India?
India is very well known globally for its talent, chip design capabilities (especially in the Indian arms of the global semicon firms) and as the world’s embedded bastion!
This particular article is brilliantly written, and kudos the author. The clinching paragraph is tucked away at the end, starting with: “None of the global players, however, is currently looking at setting up a semiconductor fabrication plant, or “fab,” in India.”
What’s happened up until now in the Indian semicon industry? If one were to look at the Special Incentive Package Scheme (SIPS), which was introduced back in Sept. 2007 by the government of India, it was geared toward encouraging investments for setting up semicon fabs, and other micro and nanotechnology manufacturing industries in India!
It also defined the “ecosystem units” as units, other than a fab unit, for manufacture of semiconductors, displays including LCDs, OLEDs, PDPs, any other emerging displays; storage devices; solar cells; photovoltaics; other advanced micro and nanotechnology products; and assembly and test of all the above products.
A Karnataka Semicon Policy was announced in early Feb. 2010, during the India Semiconductor Association’s ( ISA) Vision Summit.
Next, the government of India’s thrust on solar/PV, via the Jawaharlal Nehru National Solar Mission (JN-NSM), has at least ensured the country’s solar/PV future.
What has happened since all of these policies? Really, nothing much, at least from the perspective of the Indian semicon industry. If it has, at least, I am unaware, and my apologies for this ignorance.
Of course, solar/PV seems to be going from strength to strength! Recently, NTPC Vidyut Vyapar Nigam Ltd (NVVN) put out the list of selected solar projects under the JN-NSM Phase 1, Batch 1. But that’s another story!
On this very blog, there are several posts that speak of India’s ability or inability to build a fab. At first, folks said that semicon fabs were on their way in India, and that the story isn’t disappearing. However, somewhere along the line, that particular vision took a beating and fabs simply disappeared from the Indian semicon radar!
So, where is India?
Well, we all know that so far, India has not even managed to have a small foundry, forget about having a fab! We’ve have had semicon policies (eg. SIPS), but all it has led to is the so-called growth of the Indian solar/PV industry — and that too largely because of the Indian government’s focus on JN-NSM. The results are there for everyone to see.
The Indian semiconductor industry has not even managed to develop, nurture and build many (or any?) fabless companies of note. Very few semicon product start-ups of note have happened. Again, if there are many such entities, and they are also flourishing, please pardon me for my ignorance.
Can anyone tell us how many Indian fabless semicon companies have come up in the past five years? How many globally known Indian semicon product start-ups are there in our country for that matter? Where are the ATMP units? Even a mixture of 10 such companies does not constitute an industry, similar to one sunny day not making a summer!
India is very well known globally for its talent, chip design capabilities (especially in the Indian arms of the global semicon firms) and as the world’s embedded bastion!
This particular article is brilliantly written, and kudos the author. The clinching paragraph is tucked away at the end, starting with: “None of the global players, however, is currently looking at setting up a semiconductor fabrication plant, or “fab,” in India.”
What’s happened up until now in the Indian semicon industry? If one were to look at the Special Incentive Package Scheme (SIPS), which was introduced back in Sept. 2007 by the government of India, it was geared toward encouraging investments for setting up semicon fabs, and other micro and nanotechnology manufacturing industries in India!
It also defined the “ecosystem units” as units, other than a fab unit, for manufacture of semiconductors, displays including LCDs, OLEDs, PDPs, any other emerging displays; storage devices; solar cells; photovoltaics; other advanced micro and nanotechnology products; and assembly and test of all the above products.
A Karnataka Semicon Policy was announced in early Feb. 2010, during the India Semiconductor Association’s ( ISA) Vision Summit.
Next, the government of India’s thrust on solar/PV, via the Jawaharlal Nehru National Solar Mission (JN-NSM), has at least ensured the country’s solar/PV future.
What has happened since all of these policies? Really, nothing much, at least from the perspective of the Indian semicon industry. If it has, at least, I am unaware, and my apologies for this ignorance.
Of course, solar/PV seems to be going from strength to strength! Recently, NTPC Vidyut Vyapar Nigam Ltd (NVVN) put out the list of selected solar projects under the JN-NSM Phase 1, Batch 1. But that’s another story!
On this very blog, there are several posts that speak of India’s ability or inability to build a fab. At first, folks said that semicon fabs were on their way in India, and that the story isn’t disappearing. However, somewhere along the line, that particular vision took a beating and fabs simply disappeared from the Indian semicon radar!
So, where is India?
Well, we all know that so far, India has not even managed to have a small foundry, forget about having a fab! We’ve have had semicon policies (eg. SIPS), but all it has led to is the so-called growth of the Indian solar/PV industry — and that too largely because of the Indian government’s focus on JN-NSM. The results are there for everyone to see.
The Indian semiconductor industry has not even managed to develop, nurture and build many (or any?) fabless companies of note. Very few semicon product start-ups of note have happened. Again, if there are many such entities, and they are also flourishing, please pardon me for my ignorance.
Can anyone tell us how many Indian fabless semicon companies have come up in the past five years? How many globally known Indian semicon product start-ups are there in our country for that matter? Where are the ATMP units? Even a mixture of 10 such companies does not constitute an industry, similar to one sunny day not making a summer!
Friday, December 17, 2010
Top 20 global semicon suppliers of 2010!
I've just received a report from iSuppli, which says that the global semiconductor revenue expands by record margin in 2010 -- to $304 billion in 2010, up from $229.5 billion in 2009. This represents growth of 32.5 percent for the year! Fantastic!!
This growth is said to be courtesy of a boom in DRAM and NAND sales benefiting memory suppliers.
One hopes the semicon industry turns in an equally better performance in 2011.
In the meantime, I'd like to share with you iSuppli's preliminary ranking of the Top 20 semiconductor suppliers in 2010.
Source: iSuppli, USA.
As per iSuppli, Marvell Technology Group is likely to achieve organic revenue growth of more than 43 percent and jump five places to the No. 18 spot in 2010.
Qualcomm and AMD, and Sony have experienced revenue growth notably less than the overall market. Therefore, they will likely slip three to four positions in the rankings in 2010.
After a number of years of dramatically outperforming the market, Taiwan's MediaTek fell back to earth in 2010, as it will barely achieve revenue growth at 1.2 percent, the only company among the Top 20 to not achieve a double-digit increase. The company is likely to slip to No. 19 in the rankings, down from No. 16 place in 2009.
Only one company is at risk of dropping out of the list of 20. iSuppli projects that nVidia will retain its ranking at No. 20. However, ROHM Semiconductor is competing for the final slot among the Top 20 and the final outcome should be very close.
I hope to get into a conversation with iSuppli regarding the top 20 semicon suppliers.
This growth is said to be courtesy of a boom in DRAM and NAND sales benefiting memory suppliers.
One hopes the semicon industry turns in an equally better performance in 2011.
In the meantime, I'd like to share with you iSuppli's preliminary ranking of the Top 20 semiconductor suppliers in 2010.
Source: iSuppli, USA.As per iSuppli, Marvell Technology Group is likely to achieve organic revenue growth of more than 43 percent and jump five places to the No. 18 spot in 2010.
Qualcomm and AMD, and Sony have experienced revenue growth notably less than the overall market. Therefore, they will likely slip three to four positions in the rankings in 2010.
After a number of years of dramatically outperforming the market, Taiwan's MediaTek fell back to earth in 2010, as it will barely achieve revenue growth at 1.2 percent, the only company among the Top 20 to not achieve a double-digit increase. The company is likely to slip to No. 19 in the rankings, down from No. 16 place in 2009.
Only one company is at risk of dropping out of the list of 20. iSuppli projects that nVidia will retain its ranking at No. 20. However, ROHM Semiconductor is competing for the final slot among the Top 20 and the final outcome should be very close.
I hope to get into a conversation with iSuppli regarding the top 20 semicon suppliers.
Wednesday, December 15, 2010
Mentor’s Wally Rhines on global EDA industry challenges – II
This is the concluding part of my discussion with Dr. Walden (Wally) C. Rhines, chairman and CEO, Mentor Graphics.
EDA’s role in modeling and photomask correction
I asked Dr. Rhines about the future of EDA’s role in modeling and photomask correction. He said that in just a decade, resolution enhancement has grown from zero to over $200 million in annual revenue for the EDA industry.
“Almost all of this revenue is concentrated in two EDA companies. The value of this EDA software is clearly recognized by manufacturers. Mentor has many partnerships with manufacturers and a joint development program targeting 20nm resolution enhancement with IBM.”
Handling 22nm and sub-22nm levels
Next, with new process technology nodes becoming quite the talk of the desgin community, what does EDA now need to do at 22nm and sub 22nm levels.
Dr. Rhines said: “We have been working with our customers on this for quite some time now and are in fact well down this path. We think that most of the problems have been solved, or are solvable. Obviously, most of the issues here revolve around the lithography and manufacturability, but the EDA industry has been leading this since optical proximity correction became a key technology for the fabs quite some time ago.”
Density area savings
In an earlier discussion, the issue of how compelling would integration density area savings remain by going to new nodes had come up. I have to repeat this question, as it still seems to remain an issue.
So, how long will the integration density area savings you get by going to new nodes remain compelling?
“Hard to say!” noted Dr. Rhines. “We can see a path to 15nm with the traditional 193nm immersion lithography, and we usually surprise ourselves in our ability to go farther than we think we can. However, even if density slows down, this is but one way to achieve the continuous performance improvements that we’ve seen over the years in silicon.
“3D silicon, for instance, holds the promise of allowing us to continue to grow performance without necessarily doing it by just continuing the process shrink. Logic and memory have been on a predictable “learning curve” since the vacuum tube and I don’t expect that learning curve to deviate anytime in the foreseeable future.”
EDA’s role in modeling and photomask correction
I asked Dr. Rhines about the future of EDA’s role in modeling and photomask correction. He said that in just a decade, resolution enhancement has grown from zero to over $200 million in annual revenue for the EDA industry.“Almost all of this revenue is concentrated in two EDA companies. The value of this EDA software is clearly recognized by manufacturers. Mentor has many partnerships with manufacturers and a joint development program targeting 20nm resolution enhancement with IBM.”
Handling 22nm and sub-22nm levels
Next, with new process technology nodes becoming quite the talk of the desgin community, what does EDA now need to do at 22nm and sub 22nm levels.
Dr. Rhines said: “We have been working with our customers on this for quite some time now and are in fact well down this path. We think that most of the problems have been solved, or are solvable. Obviously, most of the issues here revolve around the lithography and manufacturability, but the EDA industry has been leading this since optical proximity correction became a key technology for the fabs quite some time ago.”
Density area savings
In an earlier discussion, the issue of how compelling would integration density area savings remain by going to new nodes had come up. I have to repeat this question, as it still seems to remain an issue.
So, how long will the integration density area savings you get by going to new nodes remain compelling?
“Hard to say!” noted Dr. Rhines. “We can see a path to 15nm with the traditional 193nm immersion lithography, and we usually surprise ourselves in our ability to go farther than we think we can. However, even if density slows down, this is but one way to achieve the continuous performance improvements that we’ve seen over the years in silicon.
“3D silicon, for instance, holds the promise of allowing us to continue to grow performance without necessarily doing it by just continuing the process shrink. Logic and memory have been on a predictable “learning curve” since the vacuum tube and I don’t expect that learning curve to deviate anytime in the foreseeable future.”
Tuesday, December 14, 2010
Mentor's Wally Rhines on global EDA industry challenges - I
It has always been such a pleasure meeting Dr. Walden (Wally) C. Rhines, CEO and chairman, Mentor Graphics Corp. During his recent visit to India, I managed to enter into a discussion with him regarding various issues facing the global EDA industry.Part one of the discussion looks at the industry, as well as EDA related issues such as predictability, verification and IP integration, how can Mentor help start-ups address EDA challenges, and going about software-to-silicon verification. May I also take this opportunity to thank my good friend, Mentor’s Veeresh Shetty.
I began by asking Dr. Rhines about the fortunes of the global EDA industry and what’s it going to be like in 2011?
He said: “The EDA industry typically follows the recovery in semiconductor industry R&D spending by six to 12 months. Mentor’s strong results in Q3 (with 60 percent growth in bookings) suggest that the recovery has already started. In our third quarter conference call, we indicated to our investors that 2011 looks like a good year as well.”
Improving predictability of design process
Coming to the EDA industry challenges, how much has EDA helped improve the predictability of the design process? Dr. Rhines said: "Well, since few, if any, do design without EDA, quite a lot! More seriously, there have been a great number of advances in the last few years that have really improved predictability.
"From intelligent test benches and emulation,that dramatically improve the verification of design, to advanced design-for-manufacturing and yield analysis techniques that greatly improve predictability of results and manufacturability in the back end."
Verification focus and need for ESA
Have the EDA tools made verification process cost effective and focus on design as well as IP integration? According to him, the cost of design really hasn’t changed that much in the last decade, at least in terms of hardware design.
"So, I think that says that we have been pretty effective as an industry in delivering cost effective design tools. In fact, the EDA software cost per transistor has decreased as fast, or faster, than the other “input” cost of semiconductors like manufacturing equipment, materials, etc.
"Evolution of third-party IP also has decreased the cost of creating SoCs and the EDA tools to integrate and verify that IP have kept pace with the increase in IP block complexity. The increase in chip development cost that designers have experienced is largely the result of the growing cost and complexity of embedded software. We need more ESA (Embedded Software Automation) to complement the benefits of EDA."
Sunday, December 12, 2010
UCLA researchers to develop non-volatile logic technology
Early this month, The Defense Advanced Research Projects Agency (DARPA) awarded an $8.4 million grant to the University of California, Los Angeles (UCLA) Henry Samueli School of Engineering and Applied Science for research on a technology known as non-volatile logic, which enables computers and electronic devices to keep their state even while powered off, then start up and run complex programs instantaneously.
The research has broad implications across a range of technologies, including portable electronics, remote sensors, unmanned aerial vehicles and high-performance computing. UCLA Engineering researchers will conduct studies into the materials, design, fabrication and tools used to develop such technologies.
"To achieve the ambitious goals of this program, we are planning to introduce key innovations in terms of both material and device structures. This is an opportunity to study new nano-magnetic physics while developing an exciting technology," said research associate Pedram Khalili, who will be the project manager at UCLA, in a release.
Thanks to Ms Wileen Wong Kromhout, director of Media Relations & Marketing, UCLA Henry Samueli School of Engineering and Applied Science, I was able to connect with Pedram Khalili, research associate, Department of Electrical Engineering, UCLA, and project manager, UCLA-DARPA STT-RAM and NV Logic Programs.
Logic technology could lead to instant-on computers
First, I asked Khalili what's this technology that is known as non-volatile logic all about? He said: "In a nutshell, it is a logic technology, which retains its state, while doing computation. That means, you can turn it off, and turn it on again, and it will resume the computation where it had left off. This is not the case with the current computers. Hence, it can lead to instant-on computers."
UCLA Engineering researchers will also conduct studies into the materials, design, fabrication and tools used to develop such technologies. So, what are these materials, design, tools, etc. going to be? Khalili added: "The materials will be ferromagnetic, i.e., we will be using dynamic phenomena -- known as spin waves -- in magnetic thin films to perform logic. The memory effect (i.e., non-volatility) will also be provided by a magnetic memory bit."
The UCLA researchers are said to be aiming to develop a prototype non-volatile logic circuit, which could lead to development of new classes of ultra–low-power, high-performance electronics. Khalili noted, "The prototype that we refer to will be a logic circuit performing a logic operation in a non-volatile manner."
The researchers are also planning to introduce key innovations in terms of both material and device structures. This is said to an opportunity to study new nano-magnetic physics, while developing an exciting technology. Khalili clarified, "Generally, we will be looking for new ways to control magnetization on the nanoscale, in a fast and energy-efficient manner."
The project will be led by UCLA under principal investigators Kang Wang and Alex Khitun, an assistant research engineer, and will involve researchers from UCLA, UC Irvine, Yale University and the University of Massachusetts.
On a personal note, I am extremely delighted to touch base with such a renowned and globally acclaimed institution like the UCLA Henry Samueli School of Engineering and Applied Science and its researchers/faculty.
Am looking forward to many more interactions with UCLA and several other globally renowned institutes, and hopefully, with many such institutes from India who are doing cutting-edge technology research.
The research has broad implications across a range of technologies, including portable electronics, remote sensors, unmanned aerial vehicles and high-performance computing. UCLA Engineering researchers will conduct studies into the materials, design, fabrication and tools used to develop such technologies.
"To achieve the ambitious goals of this program, we are planning to introduce key innovations in terms of both material and device structures. This is an opportunity to study new nano-magnetic physics while developing an exciting technology," said research associate Pedram Khalili, who will be the project manager at UCLA, in a release.
Thanks to Ms Wileen Wong Kromhout, director of Media Relations & Marketing, UCLA Henry Samueli School of Engineering and Applied Science, I was able to connect with Pedram Khalili, research associate, Department of Electrical Engineering, UCLA, and project manager, UCLA-DARPA STT-RAM and NV Logic Programs.
Logic technology could lead to instant-on computers
First, I asked Khalili what's this technology that is known as non-volatile logic all about? He said: "In a nutshell, it is a logic technology, which retains its state, while doing computation. That means, you can turn it off, and turn it on again, and it will resume the computation where it had left off. This is not the case with the current computers. Hence, it can lead to instant-on computers."
UCLA Engineering researchers will also conduct studies into the materials, design, fabrication and tools used to develop such technologies. So, what are these materials, design, tools, etc. going to be? Khalili added: "The materials will be ferromagnetic, i.e., we will be using dynamic phenomena -- known as spin waves -- in magnetic thin films to perform logic. The memory effect (i.e., non-volatility) will also be provided by a magnetic memory bit."
The UCLA researchers are said to be aiming to develop a prototype non-volatile logic circuit, which could lead to development of new classes of ultra–low-power, high-performance electronics. Khalili noted, "The prototype that we refer to will be a logic circuit performing a logic operation in a non-volatile manner."
The researchers are also planning to introduce key innovations in terms of both material and device structures. This is said to an opportunity to study new nano-magnetic physics, while developing an exciting technology. Khalili clarified, "Generally, we will be looking for new ways to control magnetization on the nanoscale, in a fast and energy-efficient manner."
The project will be led by UCLA under principal investigators Kang Wang and Alex Khitun, an assistant research engineer, and will involve researchers from UCLA, UC Irvine, Yale University and the University of Massachusetts.
On a personal note, I am extremely delighted to touch base with such a renowned and globally acclaimed institution like the UCLA Henry Samueli School of Engineering and Applied Science and its researchers/faculty.
Am looking forward to many more interactions with UCLA and several other globally renowned institutes, and hopefully, with many such institutes from India who are doing cutting-edge technology research.
Saturday, December 11, 2010
Local know-how, innovation (Jugaad) keys to realizing semicon/electronics growth in India
“We can’t just rely on making chips,” said Neeraj Paliwal, VP and NXP India country manager, while delivering his keynote: Semiconductor products for Indian market – leapfrog R&D workforce to product creation, at the recently held Mentor Graphics U2U conference. Local know-how and innovation hold the keys to realizing growth in the Indian context.
According to him, the semicon industry has evolved from initially being technology driven to customer driven, and lately, society driven. Paliwal listed four key macro growth drivers in electronics: energy efficiency, connected mobile devices, security and health.
Energy efficiency
* Efficient power conversion and low stand-by power.
* Energy-saving lighting and back-lighting.
* Energy conservation through demand side management.
* Electric/lighter vehicles, intelligent traffic management.
Connected mobile devices
* Proliferation of mobile data usage, wireless infra build-out.
* Smart mobile devices: always-on, multimedia, location-based.
* Connected car, many broadcast & connectivity standards.
* New user interfaces (e.g., touch, joystick).
Security
* Secure mobile transactions and secure identity.
* Authentication, tagging and tracking.
* Car and home access, security and remote diagnostics.
* Radar and (body) scanning installations.
Health
* Personal healthcare and portable emergency devices.
* Connected hearing aids and implantable devices.
* Car safety and comfort.
* Electronic diagnostics.
Jugaad — Indian flavor of innovation
In the Indian context, local know-how holds the key to realizing growth! Here, Paliwal introduced “Jugaad” an Indian word, which simply means an improvisational style of doing things or innovation, largely driven by or making use of scare resources available.
There is a need to develop an innovation mindset with the focus on revenue growth to reach new markets. Well, it should help when the innovations look at solving local problems first, and later, go on to address related or similar international problems.
Some examples of Indian innovations, include Tata’s water filter for rural poor for $20, which does not run on electricity; and Tata’s Nano car, which aims to reach the bottom of the pyramid. Also, John Deere’s weather recession with help from innovation. In fact, innovation could well be India’s next global export.
India has a National Innovation Council, with the aim to provide a broader plaform for innovation to redefine the understanding of innovation and move beyond the formal R&D paradigm. Another example of innovation — wireless kiosks for rural India.
According to him, the semicon industry has evolved from initially being technology driven to customer driven, and lately, society driven. Paliwal listed four key macro growth drivers in electronics: energy efficiency, connected mobile devices, security and health.
Energy efficiency
* Efficient power conversion and low stand-by power.
* Energy-saving lighting and back-lighting.
* Energy conservation through demand side management.
* Electric/lighter vehicles, intelligent traffic management.
Connected mobile devices
* Proliferation of mobile data usage, wireless infra build-out.
* Smart mobile devices: always-on, multimedia, location-based.
* Connected car, many broadcast & connectivity standards.
* New user interfaces (e.g., touch, joystick).
Security
* Secure mobile transactions and secure identity.
* Authentication, tagging and tracking.
* Car and home access, security and remote diagnostics.
* Radar and (body) scanning installations.
Health
* Personal healthcare and portable emergency devices.
* Connected hearing aids and implantable devices.
* Car safety and comfort.
* Electronic diagnostics.
Jugaad — Indian flavor of innovation
In the Indian context, local know-how holds the key to realizing growth! Here, Paliwal introduced “Jugaad” an Indian word, which simply means an improvisational style of doing things or innovation, largely driven by or making use of scare resources available.
There is a need to develop an innovation mindset with the focus on revenue growth to reach new markets. Well, it should help when the innovations look at solving local problems first, and later, go on to address related or similar international problems.
Some examples of Indian innovations, include Tata’s water filter for rural poor for $20, which does not run on electricity; and Tata’s Nano car, which aims to reach the bottom of the pyramid. Also, John Deere’s weather recession with help from innovation. In fact, innovation could well be India’s next global export.
India has a National Innovation Council, with the aim to provide a broader plaform for innovation to redefine the understanding of innovation and move beyond the formal R&D paradigm. Another example of innovation — wireless kiosks for rural India.
Friday, December 10, 2010
EDA and emerging system design challenges: Dr. Wally Rhines
According to Dr. Walden C. Rhines, CEO and chairman, Mentor Graphics, the emerging system design challenges likely to shape the industry in the coming decade are:
* Design for low power.
* Optimizing for performance and power.
* Functional verification complexity explosion.
* Place and route timing and power closure.
* Physical verification complexity.
* Manufacturing yields.
* Increasing cost of design.
* Macro system integration.
He was delivering the keynote titled:EDA and emerging system design challenges at Mentor Graphics’ U2U India conference in Bangalore.
First, Dr. Rhines highlighted that the EDA market churn is often confused with industry consolidation. EDA requires specialization. The #1 supplier in each EDA product segment averages 66 percent+ market share. However, the traditional EDA market has not been growing.
EDA market snapshot
The synthesis market trend has seen a 2.7 percent CAGR, with a 10-year average of $293 million. The market size was $273 million in 2008, and slid to $243 million in 2009. In 2010, after the first two quarters, it is approximately $125-$130 million.
The RTL simulation market trend has seen a -0.3 percent CAGR, with a 10-year average of $365 million. The market size was $394 million in 2008, and slid to $345 million in 2009. In 2010, after the first two quarters, it is approximately $150 million.
The IC layout verification market trend has seen a 0 percent CAGR, with a 10-year average of $199 million. The market size was $199 million in 2008, and slid to $187 million in 2009. In 2010, after the first two quarters, it is approximately $80-$90 million.
The IC physical implementation market trend has seen a 2.4 percent CAGR, with a 10-year average of $559 million. The market size was $549 million in 2008, and slid to $448 million in 2009. In 2010, after the first two quarters, it is approximately $210 million.
The total PCB/MCM design market trend has had a 10-year average of $484 million. The market size was $535 million in 2008, and slid to $490 million in 2009. In 2010, after the first two quarters, it is approximately $220 million. PCB design has seen growth from analysis, design for manufacturing and new emerging markets.
Dr. Rhines indicated that the global designer population growth is increasing. Asia is the only growing region in EDA. During 2000-2009, growth has been 11 percent in Pac Rim, 2 percent in Europe, 1 percent in Japan and -1 percent in America.
EDA TAM growth is driven primarily by emergence of new markets. Most EDA revenue growth comes from major new design methodologies. The areas that grew during 2000-2009 are DFM- 33 percent CAGR, ESL — 12 percent, Formal verification – 11 percent, IC/ASIC analysis – 9 percent, respectively. System level issues have also become a bigger part of chip and board design.
“System” level issues are now becoming a bigger part of chip and board design.
* Design for low power.
* Optimizing for performance and power.
* Functional verification complexity explosion.
* Place and route timing and power closure.
* Physical verification complexity.
* Manufacturing yields.
* Increasing cost of design.
* Macro system integration.
He was delivering the keynote titled:EDA and emerging system design challenges at Mentor Graphics’ U2U India conference in Bangalore.First, Dr. Rhines highlighted that the EDA market churn is often confused with industry consolidation. EDA requires specialization. The #1 supplier in each EDA product segment averages 66 percent+ market share. However, the traditional EDA market has not been growing.
EDA market snapshot
The synthesis market trend has seen a 2.7 percent CAGR, with a 10-year average of $293 million. The market size was $273 million in 2008, and slid to $243 million in 2009. In 2010, after the first two quarters, it is approximately $125-$130 million.
The RTL simulation market trend has seen a -0.3 percent CAGR, with a 10-year average of $365 million. The market size was $394 million in 2008, and slid to $345 million in 2009. In 2010, after the first two quarters, it is approximately $150 million.
The IC layout verification market trend has seen a 0 percent CAGR, with a 10-year average of $199 million. The market size was $199 million in 2008, and slid to $187 million in 2009. In 2010, after the first two quarters, it is approximately $80-$90 million.
The IC physical implementation market trend has seen a 2.4 percent CAGR, with a 10-year average of $559 million. The market size was $549 million in 2008, and slid to $448 million in 2009. In 2010, after the first two quarters, it is approximately $210 million.
The total PCB/MCM design market trend has had a 10-year average of $484 million. The market size was $535 million in 2008, and slid to $490 million in 2009. In 2010, after the first two quarters, it is approximately $220 million. PCB design has seen growth from analysis, design for manufacturing and new emerging markets.
Dr. Rhines indicated that the global designer population growth is increasing. Asia is the only growing region in EDA. During 2000-2009, growth has been 11 percent in Pac Rim, 2 percent in Europe, 1 percent in Japan and -1 percent in America.
EDA TAM growth is driven primarily by emergence of new markets. Most EDA revenue growth comes from major new design methodologies. The areas that grew during 2000-2009 are DFM- 33 percent CAGR, ESL — 12 percent, Formal verification – 11 percent, IC/ASIC analysis – 9 percent, respectively. System level issues have also become a bigger part of chip and board design.
“System” level issues are now becoming a bigger part of chip and board design.
Thursday, December 9, 2010
Women power, RVCE rule at first annual Karnataka VLSI and embedded systems awards
It is always a pleasure to witness women power in technology! More especially, in India!! To my pleasant surprise, and am sure, of many others present, women power was aplenty at the first annual Karnataka VLSI and Embedded Systems Awards distribution ceremony held today at the RV-VLSI Design Center, Bangalore.
First, the winners! Congratulations to each one of them on their achievement!
VLSI category
Winner: Suraj H, Vinay R, Vinaya Ajjampura and Vasudev Pai M, RVCE, E&C.
Title: Design and verification of 16-bit pipelined microcontroller.
Runner-up: Deepika, Deepthi MN, Divya V Nayak, RVCE, Telecom — an all-women team!
Title: Design and verification of stand-alone DMA controller.
Embedded category
Winner: Praseed Chandriki, Prashant Bhat, Anup Reddy, Manoranjan S, RVCE, E&C.
Title: Implementtion of media transport in VoIP and performance analysis through measurement of QoS.
Runner-up: Ashwini HV, Sayak Bhowmick, Shruthi BR, Shruti S. Rao, Global Academy of Technology, E&C.
Title: DARAM driver for VoIP router.
It was announced that Mentor Graphics, along with STMicroelectronics, will be sponsoring next year’s awards.
This year’s contest was initiated by RV-VLSI in close association with VTU, and sponsored by Mentor Graphics. Dr. Walden C. Rhines, CEO and chairman, Mentor Graphics, graced the occassion. Dr. V.S. Acharya, the Honorable minister for Higher Education, Planning and Statistics, Government of Karnataka, who could not make it to the event owing to pressing official work, had his message read out.
Other digitaries present on the occasion included Hanns Windele, VP Mentor Graphics (Europe & India), Ian Burgess, Higher Education Program, Mentor Graphics, CV Hayagriv, Trustee, Rashtreeya Sikshana Samiti Trust, and chairman, governing council, RV-VLSI Design Center, AVS Murthy, honarary secretary, Rashtreeya Sikshana Samiti Trust, and Dr. MK Panduranga Setty, president, Rashtreeya Sikshana Samiti Trust (RSST).
RV-VLSI can tape-out multi-billion transistor chip today!
Venkatesh Prasad, CEO, RV-VLSI Design Center, said it was his interaction with a visionary like Dr. MK Panduranga Setty, and the support of the board of trustees of RSST that made it easy for him to transition out of the industry and start RV-VLSI. The vision of RV-VLSI is to create a steady stream of well trained professionals with a low TTP (time to be productive). To achieve a low TTP, it had to do things different from a traditional academic institution.
That differentiation started with the name, RV-VLSI Design Center itself, rather than RVDI. Next, the institute procured a Sun data center to meets its complex needs. Next, it gained access to foundry technology from Tower Semiconductor and EDA software from Mentor Graphics. Prasad added, ‘RV-VLSI has the infrastructure to design and tape-out a multi-billion transistor chip today.”
First, the winners! Congratulations to each one of them on their achievement!VLSI category
Winner: Suraj H, Vinay R, Vinaya Ajjampura and Vasudev Pai M, RVCE, E&C.
Title: Design and verification of 16-bit pipelined microcontroller.
Runner-up: Deepika, Deepthi MN, Divya V Nayak, RVCE, Telecom — an all-women team!
Title: Design and verification of stand-alone DMA controller.
Embedded category
Winner: Praseed Chandriki, Prashant Bhat, Anup Reddy, Manoranjan S, RVCE, E&C.
Title: Implementtion of media transport in VoIP and performance analysis through measurement of QoS.
Runner-up: Ashwini HV, Sayak Bhowmick, Shruthi BR, Shruti S. Rao, Global Academy of Technology, E&C.
Title: DARAM driver for VoIP router.
It was announced that Mentor Graphics, along with STMicroelectronics, will be sponsoring next year’s awards.
This year’s contest was initiated by RV-VLSI in close association with VTU, and sponsored by Mentor Graphics. Dr. Walden C. Rhines, CEO and chairman, Mentor Graphics, graced the occassion. Dr. V.S. Acharya, the Honorable minister for Higher Education, Planning and Statistics, Government of Karnataka, who could not make it to the event owing to pressing official work, had his message read out.
Other digitaries present on the occasion included Hanns Windele, VP Mentor Graphics (Europe & India), Ian Burgess, Higher Education Program, Mentor Graphics, CV Hayagriv, Trustee, Rashtreeya Sikshana Samiti Trust, and chairman, governing council, RV-VLSI Design Center, AVS Murthy, honarary secretary, Rashtreeya Sikshana Samiti Trust, and Dr. MK Panduranga Setty, president, Rashtreeya Sikshana Samiti Trust (RSST).RV-VLSI can tape-out multi-billion transistor chip today!
Venkatesh Prasad, CEO, RV-VLSI Design Center, said it was his interaction with a visionary like Dr. MK Panduranga Setty, and the support of the board of trustees of RSST that made it easy for him to transition out of the industry and start RV-VLSI. The vision of RV-VLSI is to create a steady stream of well trained professionals with a low TTP (time to be productive). To achieve a low TTP, it had to do things different from a traditional academic institution.
That differentiation started with the name, RV-VLSI Design Center itself, rather than RVDI. Next, the institute procured a Sun data center to meets its complex needs. Next, it gained access to foundry technology from Tower Semiconductor and EDA software from Mentor Graphics. Prasad added, ‘RV-VLSI has the infrastructure to design and tape-out a multi-billion transistor chip today.”
Wednesday, December 8, 2010
Cowan LRA model: Global semicon sales forecast based On Oct. 2010 actual sales
This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.
Cowan has provided the latest monthly sales forecast update. Note that the latest sales forecast results capture not only the last quarter of 2010, but also provide the model's "take" on 2011. On Sunday, 12-05-10, the WSTS posted the October 2010's global semiconductor sales report (Historical Billings Report, HBR) on its website.
Therefore, with the WSTS having released its actual Oct. 2010 global semiconductor sales number, Cowan is sharing the latest monthly update to the Cowan LRA Model's derived forecast numbers. The latest sales forecast estimates for 4Q and 2010 "decreased" from last month's forecast estimates as summarized and discussed below.
Additionally, Cowan has extended the model in order to provide a "first look" at sales and sales growth estimates for each of the four quarters (and full year) of 2011.
October semicon sales
The actual Oct. 2010 global semiconductor sales released by the WSTS came in at $24.550 billion which is:
* 10.7 percent higher than last year's (2009) actual October sales of $22.181 billion;
* Down 15.3 percent from last month's (September) actual sales of $28.981 billion (Note - revised downward by $0.391 billion from last month's WSTS published sales number of $29.372 billion for September);
* And lower (by $0.593 billion, or down 2.4 percent) compared to last month's (September's projection) sales forecast estimate for Oct., that is, $25.143 billion;
* Thus, the Cowan LRA Model's Momentum Indicator, MI, went less negative (rose to -2.4 percent) compared to last month's more negative posture (at -6.5 percent).
Note: November 2010’s Sales Forecast Estimate is projected to be $25.566 billion.
Cowan has provided the latest monthly sales forecast update. Note that the latest sales forecast results capture not only the last quarter of 2010, but also provide the model's "take" on 2011. On Sunday, 12-05-10, the WSTS posted the October 2010's global semiconductor sales report (Historical Billings Report, HBR) on its website.
Therefore, with the WSTS having released its actual Oct. 2010 global semiconductor sales number, Cowan is sharing the latest monthly update to the Cowan LRA Model's derived forecast numbers. The latest sales forecast estimates for 4Q and 2010 "decreased" from last month's forecast estimates as summarized and discussed below.
Additionally, Cowan has extended the model in order to provide a "first look" at sales and sales growth estimates for each of the four quarters (and full year) of 2011.
October semicon sales
The actual Oct. 2010 global semiconductor sales released by the WSTS came in at $24.550 billion which is:
* 10.7 percent higher than last year's (2009) actual October sales of $22.181 billion;
* Down 15.3 percent from last month's (September) actual sales of $28.981 billion (Note - revised downward by $0.391 billion from last month's WSTS published sales number of $29.372 billion for September);
* And lower (by $0.593 billion, or down 2.4 percent) compared to last month's (September's projection) sales forecast estimate for Oct., that is, $25.143 billion;
* Thus, the Cowan LRA Model's Momentum Indicator, MI, went less negative (rose to -2.4 percent) compared to last month's more negative posture (at -6.5 percent).
Note: November 2010’s Sales Forecast Estimate is projected to be $25.566 billion.
Monday, December 6, 2010
Is the Indian semicon industry losing the plot?
Every time I see a new electronics or related segment being talked about in India — be it medical electronics/healthcare, RFID and smart cards, or for that matter, telecom, why do I get this feeling that the Indian semicon industry is slowly losing the plot? One hopes not!
The Indian technology industry is talking about practically everything, except semiconductors. Yes, I know we have a great pool of designers who work in the MNCs. Also, there are plenty of Indian design services companies doing excellent work (for others?). India’s strength in embedded is folk lore. Despite all of this, we are, where we were a few years ago!
Back in 2007, I’d done a story on how there were very remote chances of having a fab in India. Back then, some industry folks expressed optimism that the fab story was not dead! However, that story is well and truly dead and buried, as of now! Today, no one wants to talk about a fab — fine, then!
Let’s do a reality check on India’s semiconductor score-card!
So far, India has not even managed to have a small foundry, forget about having a fab! Nor has the Indian industry managed to develop, nurture and build many (or any) fabless companies of note. Can you tell me how many Indian fabless semicon companies have come up in the past five years? How many globally known Indian semicon product start-ups are there in our country for that matter? Okay, how many Indian semicon product start-ups are there in our country?
For that matter, how many ATMP units have come up in India? I do recall some industry folks mention in the past that there will be some ATMP units happening. Where are they? Okay, who, in India, is even trying to develop IP libraries?
Even if there is some success in building electronic product companes — that is and will be limited success! Neither is there any evidence of cutting-edge R&D being done in India. Please do not mix this up with the work being done by the Indian arms of the various MNCs.
Why, I don’t even think that the industry-academia partnership has developed substantially, leave alone mature!
If medical electronics, or some other related area, were to go on and succeed in the near future, it would be counted as a success for the Indian electronics industry, and not for the Indian semicon industry! Even if this did happen and it was counted as a ‘semicon success, can anyone make a guess as to how many of the chips going into such devices would be actually made in India – by Indian firms?
I had mentioned back in Feb. 2009 that “Can the Indian semicon industry dream big? (And even buy Qimonda?)! To refresh your memory, there was a large 300mm fab up for sale in Dresden, Germany. Well, even that never happened, or well, the Indian industry did not think it to be of much importance!
Back in August 2009, there was news about Texas Instruments (TI) placing a bid of $172.5 million for buying Qimonda’s 300mm production tools from its closed DRAM fab. While this highlighted TI’s focus on building the world’s first 300mm analog fab, I can’t stop wondering: what would have happened had an Indian investor actually bought Qimonda’s fab, instead of TI.
Perhaps, it would be better for the Indian semicon industry to stick to its globally known strengths of providing excellent semiconductor design services and embedded design services. At least, there will be clear direction in these areas.
Of course, there exist huge opportunities in all of the areas (or gaps) that I've touched upon.
The Indian technology industry is talking about practically everything, except semiconductors. Yes, I know we have a great pool of designers who work in the MNCs. Also, there are plenty of Indian design services companies doing excellent work (for others?). India’s strength in embedded is folk lore. Despite all of this, we are, where we were a few years ago!
Back in 2007, I’d done a story on how there were very remote chances of having a fab in India. Back then, some industry folks expressed optimism that the fab story was not dead! However, that story is well and truly dead and buried, as of now! Today, no one wants to talk about a fab — fine, then!
Let’s do a reality check on India’s semiconductor score-card!
So far, India has not even managed to have a small foundry, forget about having a fab! Nor has the Indian industry managed to develop, nurture and build many (or any) fabless companies of note. Can you tell me how many Indian fabless semicon companies have come up in the past five years? How many globally known Indian semicon product start-ups are there in our country for that matter? Okay, how many Indian semicon product start-ups are there in our country?
For that matter, how many ATMP units have come up in India? I do recall some industry folks mention in the past that there will be some ATMP units happening. Where are they? Okay, who, in India, is even trying to develop IP libraries?
Even if there is some success in building electronic product companes — that is and will be limited success! Neither is there any evidence of cutting-edge R&D being done in India. Please do not mix this up with the work being done by the Indian arms of the various MNCs.
Why, I don’t even think that the industry-academia partnership has developed substantially, leave alone mature!
If medical electronics, or some other related area, were to go on and succeed in the near future, it would be counted as a success for the Indian electronics industry, and not for the Indian semicon industry! Even if this did happen and it was counted as a ‘semicon success, can anyone make a guess as to how many of the chips going into such devices would be actually made in India – by Indian firms?
I had mentioned back in Feb. 2009 that “Can the Indian semicon industry dream big? (And even buy Qimonda?)! To refresh your memory, there was a large 300mm fab up for sale in Dresden, Germany. Well, even that never happened, or well, the Indian industry did not think it to be of much importance!
Back in August 2009, there was news about Texas Instruments (TI) placing a bid of $172.5 million for buying Qimonda’s 300mm production tools from its closed DRAM fab. While this highlighted TI’s focus on building the world’s first 300mm analog fab, I can’t stop wondering: what would have happened had an Indian investor actually bought Qimonda’s fab, instead of TI.
Perhaps, it would be better for the Indian semicon industry to stick to its globally known strengths of providing excellent semiconductor design services and embedded design services. At least, there will be clear direction in these areas.
Of course, there exist huge opportunities in all of the areas (or gaps) that I've touched upon.
Friday, December 3, 2010
How are femtocells enhancing CDMA networks?
The CDMA Development Group (CDG) and Femto Forum recently hosted a discussion on ‘How Femtocells are Enhancing CDMA Networks.”
James Person, COO, CDG was the moderator, while the panelists were Andy Germano, vice chairman, Femto Forum, Josh Adelson, director, Product Marketing, Airvana, and Sameer Lalwani, staff manager, Technology Valuation, Qualcomm.
Femto market update
Presenting a market update on femtos for CDMA, Andy Germano, vice chairman, Femto Forum, said femtocells have arrived and are shaping up into a key tool for mobile broadband service delivery.
There are 58 operators covering over 1.5 billion mobile subscribers – 33 percent of the global total. There are also 77 providers of femtocell technology covering all aspects of the ecosystem.
He highlighted some critical industry data points. For instance, the O2 network has seen an 18-fold increase in data carried over the network last year. Next, wireless data traffic on the AT&T network has grown more than 5,000 percent over the past three years.
So, why are people deploying femtocells? What’s driving growth? Naturally, the explosion of Internet connected devices — iPads, iPhones, and the like, are driving growth. There has been an exponential growth of mobile data traffic as well. Further, more than 80 percent of the traffic is indoors, and very little percentage of the traffic is mobile.
A femtocell is a simple, low cost, easy-to-install cellular access point for homes (and offices and metro areas). It is able to deliver fast, reliable service to standard phones over licensed spectrum. Further, femtocell is supported in 3G and next-generation standards by 3GPP, 3GPP2, WiMAX Forum, Broadband Forum, etc.
The shape of mobile networks has changed as well. As a data point, the US earlier had 200,000 macrocell sites. The number of femtocells is now greater than the number of macrocells. Today, there are 350,000 femtocell sites as against 256,000 macrocell sites.
James Person, COO, CDG was the moderator, while the panelists were Andy Germano, vice chairman, Femto Forum, Josh Adelson, director, Product Marketing, Airvana, and Sameer Lalwani, staff manager, Technology Valuation, Qualcomm.
Femto market update
Presenting a market update on femtos for CDMA, Andy Germano, vice chairman, Femto Forum, said femtocells have arrived and are shaping up into a key tool for mobile broadband service delivery.There are 58 operators covering over 1.5 billion mobile subscribers – 33 percent of the global total. There are also 77 providers of femtocell technology covering all aspects of the ecosystem.
He highlighted some critical industry data points. For instance, the O2 network has seen an 18-fold increase in data carried over the network last year. Next, wireless data traffic on the AT&T network has grown more than 5,000 percent over the past three years.
So, why are people deploying femtocells? What’s driving growth? Naturally, the explosion of Internet connected devices — iPads, iPhones, and the like, are driving growth. There has been an exponential growth of mobile data traffic as well. Further, more than 80 percent of the traffic is indoors, and very little percentage of the traffic is mobile.
A femtocell is a simple, low cost, easy-to-install cellular access point for homes (and offices and metro areas). It is able to deliver fast, reliable service to standard phones over licensed spectrum. Further, femtocell is supported in 3G and next-generation standards by 3GPP, 3GPP2, WiMAX Forum, Broadband Forum, etc.
The shape of mobile networks has changed as well. As a data point, the US earlier had 200,000 macrocell sites. The number of femtocells is now greater than the number of macrocells. Today, there are 350,000 femtocell sites as against 256,000 macrocell sites.
Thursday, December 2, 2010
Indian medical electronics equipment industry to grow at 17 percent CAGR over next five years: ISA
The India Semiconductor Association (ISA) released a sector report on the opportunities in the Indian medical electronics field, titlled: “Current status and potential for medical electronics in India”, 2010, at Narayana Hrudayalaya campus in Bangalore, India.
The Indian healthcare market (FY ’09) has been valued at Rs. 300,000 crores ($63 billion). Of this, healthcare delivery makes up 72 percent, pharmaceutical industry 20 percent, health insurance 5 percent, medical equipment 1.4 percent, medical consumables 1.1 percent, and medical IT 0.2 percent, respectively.
Medical electronics has been valued at Rs. 3,850 crores ($820 million) of the overall Indian healthcare market of Rs. 300,000 crores ($63 billion). The medical equipment growth market is estimated to grow at a CAGR of 17 percent over the next five years in India, and reach Rs. 9,735 crores ($2.075 billion).
As per the ISA report, the Indian healthcare industry currently contributes to 5.6 percent of GDP, which is estimated to increase to 8–8.5 percent in FY 13.
Source: ISA-Feedback 2010.
The domestic market for medical equipment currently stands at Rs. 3,850 crores ($820 million). Annually, medical equipments worth Rs. 2,450 crores ($520 million) is manufactured in India, out of which Rs. 350 crore ($75 million) is exported.
The growth of medical equipment market is directly proportionate to the growth of healthcare delivery, which stood at Rs. 2,16,000 crores ($45.36 billion) in 2009 Also, Siemens, Wipro GE and Philips are the leaders in the space with 18 percent, 17 percent and 10 percent market share respectively. However, 45 percent of the market is addressed by smaller, niche domestic players.
The report was released by Dr. Devi Prasad Shetty, CMD, Narayana Hrudayalaya, in the presence of Dr. Bobby Mitra, ISA chairman, Poornima Shenoy, ISA president and Vivek Sharma, convener of the ISA Medical Electronics Segment.
The Indian healthcare market (FY ’09) has been valued at Rs. 300,000 crores ($63 billion). Of this, healthcare delivery makes up 72 percent, pharmaceutical industry 20 percent, health insurance 5 percent, medical equipment 1.4 percent, medical consumables 1.1 percent, and medical IT 0.2 percent, respectively.
Medical electronics has been valued at Rs. 3,850 crores ($820 million) of the overall Indian healthcare market of Rs. 300,000 crores ($63 billion). The medical equipment growth market is estimated to grow at a CAGR of 17 percent over the next five years in India, and reach Rs. 9,735 crores ($2.075 billion).
As per the ISA report, the Indian healthcare industry currently contributes to 5.6 percent of GDP, which is estimated to increase to 8–8.5 percent in FY 13.
Source: ISA-Feedback 2010.The domestic market for medical equipment currently stands at Rs. 3,850 crores ($820 million). Annually, medical equipments worth Rs. 2,450 crores ($520 million) is manufactured in India, out of which Rs. 350 crore ($75 million) is exported.
The growth of medical equipment market is directly proportionate to the growth of healthcare delivery, which stood at Rs. 2,16,000 crores ($45.36 billion) in 2009 Also, Siemens, Wipro GE and Philips are the leaders in the space with 18 percent, 17 percent and 10 percent market share respectively. However, 45 percent of the market is addressed by smaller, niche domestic players.
The report was released by Dr. Devi Prasad Shetty, CMD, Narayana Hrudayalaya, in the presence of Dr. Bobby Mitra, ISA chairman, Poornima Shenoy, ISA president and Vivek Sharma, convener of the ISA Medical Electronics Segment.
Wednesday, December 1, 2010
STMicroelectronics unveils STM32 F-2 series of MCUs
STMicroelectronics has unveiled its roadmap for ARM Cortex-M4 and -M0 with products sampling from mid 2011 onward and production by end of 2011. It has also unleashed the full performance of the Cortex-M3 with its latest STM32 F-2 series.
According to Vinay Thapliyal, technical marketing manager, MCU, STMicroelectronics, India, there are over 30 new part numbers, pin-to-pin and software compatible with existing STM32 devices.
He said: "Today, we already have 110 parts running for the F-1 series, which is currently existing and in full production. Now, we are extending the family. This time, we have launched the F-2 family -- the highest performance family to unleash the ultimate performance of Cortex-M3." Naturally, the F-2 series is benefiting the F-1 devices.
As mentioned, 30 new devices will be launched. They are already ramping now. "All of these belong to the high-performance, low-power family. We will also be revealing our roadmap for M4 and M0 -- to be in production by end of 2011, with sampling by middle of 2011."
ST's F-2 series will further enhance real time preformance. Thapliyal added that ST has built in ART accelerator into these devices. This will deliver 150 DMIPS (Dhrystone MIPS) at 120MHz.
The adaptive real-time memory accelerator unleashes the Cortex-M3 core’s maximum processing performance equivalent to 0-wait state execution Flash up to 120 MHz.
The ART accelerator is a pre-fetch queue and branch cache mechanism that stores the first instructions and constants of the branches, interrupt and subroutine calls. The penalty occurs the first time those events occur like for any pipelining mechanism.
After that, the instructions stored in cache are pushed immediately in the pref-etch queue upon recognition of a stored branch address. In addition, the embedded Flash is organized in 128-bit rows, allowing up to 8 (16-bit) instructions to be read per access.
According to Vinay Thapliyal, technical marketing manager, MCU, STMicroelectronics, India, there are over 30 new part numbers, pin-to-pin and software compatible with existing STM32 devices.
He said: "Today, we already have 110 parts running for the F-1 series, which is currently existing and in full production. Now, we are extending the family. This time, we have launched the F-2 family -- the highest performance family to unleash the ultimate performance of Cortex-M3." Naturally, the F-2 series is benefiting the F-1 devices.
As mentioned, 30 new devices will be launched. They are already ramping now. "All of these belong to the high-performance, low-power family. We will also be revealing our roadmap for M4 and M0 -- to be in production by end of 2011, with sampling by middle of 2011."
ST's F-2 series will further enhance real time preformance. Thapliyal added that ST has built in ART accelerator into these devices. This will deliver 150 DMIPS (Dhrystone MIPS) at 120MHz.The adaptive real-time memory accelerator unleashes the Cortex-M3 core’s maximum processing performance equivalent to 0-wait state execution Flash up to 120 MHz.
The ART accelerator is a pre-fetch queue and branch cache mechanism that stores the first instructions and constants of the branches, interrupt and subroutine calls. The penalty occurs the first time those events occur like for any pipelining mechanism.
After that, the instructions stored in cache are pushed immediately in the pref-etch queue upon recognition of a stored branch address. In addition, the embedded Flash is organized in 128-bit rows, allowing up to 8 (16-bit) instructions to be read per access.
Tuesday, November 30, 2010
INSIDE Contactless unveils SecuRead NFC solution for mobile handset market
INSIDE Contactless has unveiled SecuRead, a breakthrough NFC solution for the mobile handset market. This chip will be integrated into production handsets by mid-2011.
SecuRead is a complete, system-in-package (SIP) NFC solution that makes it simple for mobile device manufacturers and NFC infrastructure providers to integrate all of the contactless, security and application functions required for a broad range of contactless NFC payment, transit, ID and access control applications.
According to the company, SecuRead features INSIDE’s award-winning MicroRead NFC controller, a high-performance, highly secure SLE 97-family secure element from Infineon, a GlobalPlatform-compliant Java Card OS from Giesecke & Devrient and INSIDE’s Open NFC protocol stack to provide a best-of-breed solution that helps mobile device manufacturers bring rich NFC capabilities to market more quickly.
Loic Hamon, VP of products and marketing for NFC at INSIDE Contactless, said that 2011 will be the inflection point for NFC with over 50Mu devices. There are multiple committed handset ecosystems. Also, there are wireless carrier commitments, consortia, initiatives, etc. Android is now a major market driver – outselling the iPhone.
As for the regional situation, the US is witnessing mobile payment (embedded secure element). Korea is seeing a replacement of T-money (transport, payment, loyalty), UICC based. In Nice, France, there will be multi-carrier, multi-service, UICC-based, national rollout in 2011.
Ecosystem alignments are needed, and business models have to be proven. Also, NFC peripherals will contribute to market acceleration.
SecuRead is a complete, system-in-package (SIP) NFC solution that makes it simple for mobile device manufacturers and NFC infrastructure providers to integrate all of the contactless, security and application functions required for a broad range of contactless NFC payment, transit, ID and access control applications. According to the company, SecuRead features INSIDE’s award-winning MicroRead NFC controller, a high-performance, highly secure SLE 97-family secure element from Infineon, a GlobalPlatform-compliant Java Card OS from Giesecke & Devrient and INSIDE’s Open NFC protocol stack to provide a best-of-breed solution that helps mobile device manufacturers bring rich NFC capabilities to market more quickly.
Loic Hamon, VP of products and marketing for NFC at INSIDE Contactless, said that 2011 will be the inflection point for NFC with over 50Mu devices. There are multiple committed handset ecosystems. Also, there are wireless carrier commitments, consortia, initiatives, etc. Android is now a major market driver – outselling the iPhone.
As for the regional situation, the US is witnessing mobile payment (embedded secure element). Korea is seeing a replacement of T-money (transport, payment, loyalty), UICC based. In Nice, France, there will be multi-carrier, multi-service, UICC-based, national rollout in 2011.
Ecosystem alignments are needed, and business models have to be proven. Also, NFC peripherals will contribute to market acceleration.
Thursday, November 25, 2010
View 3D TV, without glasses, today!
Did you ever want to watch the latest movie or ball game with flawless, immersive 3D images on your 2D LCD screen without using 3D glasses? I sure do! All the time!!
I even suggested to a semicon company recently, which is providing HD media processor SoCs, to highlight a solution, which will allow the man in the street to pick up the DVD of Harry Potter and the Deathly Hallows – Part 1, insert it into the player, and enjoy the movie on his TV in 3D! All of it, without wearing 3D glasses!
Sounds quite far fetched, isn’t it?
3D TV viewing possible on 2D TV, today!
Well, I believe, Stephen Blumenthal, president of 3DFusion, surprised everyone at the Paul Kagan 3D Market Media Conference at Waldorf Astoria Hotel on October 27 last month, when he, along with his partner Ilya Sorokin, invited the audience to visit the 3DFusion business suite, located upstairs in the Waldorf, to experience the picture perfect 3DFMax glasses free 3D ASD, and see a real time, live 3D stereo camera capture display!
Steve was kind enough to share his landmark speech with me, as well. First up, many congrats to Steve and 3DFusion!
His opening line itsef is very interesting: “This is a historic day for me, as I started out as a TV repair man from Ithaca NY, and now today, we are introducing for the first time, a 3DTV, glasses free Broadcast Quality, Perfect Picture television platform, one destined I believe to replace 2D TV.”
“We are here to introduce a 3D technological advancement, which marries the classical 3D left/ right stereo pair, with a Math augmented, Depth Meta Data (DMD) approach. The addition of DMD to the stereo pair, results in an interactivityy giving the operator mastery over the 3D image. For the first time we can demonstrate an on the fly, real time, intervention with the 3D video signal path.
“What we have is a methodology of video signal integration with PC driven algorithms that support an ability to control signal parameters, which determine depth visuals on a variety of Auto Stereoscopic Displays. The 3DFMax DMD Algorithm approach mines the stereo depth information and converts it to META data which is inserted as the right field of the frame, replacing the right view, as a gray scale mapping.
“This data is auto converted by our Firmware, on the fly into 9 Multiviews as the key to the pixel per pixel orientation for the lenticular lens or lenticule, thereby controlling the depth cues. One 3DFmax video frame is composed of the left field as a full resolution view, with the Right field operating as a lightweight DMD map which may be re-rendered in real time, visible on the 3DFMax ASD screen, thereby providing instant correction and adjustment to the images depth visual cues.
He further said: “This is not your grand pa’s 3D, it is the beginning of 3D’s disruptive impact on all 2D video imaging technologies. To support this end, our 3DFMax ASD solution is Agnostic and is designed for Universal applications, as both our IP hardware and software are broad based, and are adaptable to solving a wide variety of ASD problems.”
3DFusion has re-invented the DMD approach, and filed IP based on an algorithmic manipulation of the Depth Meta Data, which it has branded under the, “ 3DFMax” trademark.
Blumenthal continued: “Most of the 3D pundits agree that if 3DTV is ever to replace 2D, as a mass market, consumer electronics item it must be glasses free, address and solve all of the competitive features available of 2d, and be a seamless replacement for the Television industries production and distribution infrastructure.
“3DFusion was formed to address this task. And I am proud to say, that as the inventors the of the 3DFMax, image optimization technology, Ilya and I, with a great team of artist and engineers, as of last week, have in fact, completed this task.
“3DFusion is here today to introduce to you, a 3DTV glasses free, Broadcast Quality Standard, perfect picture, 3D technological advancement of significant industry and market impact, which is not years away.”
The company is looking for investors and strategic partners to make this technology available for widespread vertical market applications.
I have contacted Steve and hope to speak directly with him. Should I do, you will hear it all, right here!
I even suggested to a semicon company recently, which is providing HD media processor SoCs, to highlight a solution, which will allow the man in the street to pick up the DVD of Harry Potter and the Deathly Hallows – Part 1, insert it into the player, and enjoy the movie on his TV in 3D! All of it, without wearing 3D glasses!
Sounds quite far fetched, isn’t it?
3D TV viewing possible on 2D TV, today!
Well, I believe, Stephen Blumenthal, president of 3DFusion, surprised everyone at the Paul Kagan 3D Market Media Conference at Waldorf Astoria Hotel on October 27 last month, when he, along with his partner Ilya Sorokin, invited the audience to visit the 3DFusion business suite, located upstairs in the Waldorf, to experience the picture perfect 3DFMax glasses free 3D ASD, and see a real time, live 3D stereo camera capture display!
Steve was kind enough to share his landmark speech with me, as well. First up, many congrats to Steve and 3DFusion!His opening line itsef is very interesting: “This is a historic day for me, as I started out as a TV repair man from Ithaca NY, and now today, we are introducing for the first time, a 3DTV, glasses free Broadcast Quality, Perfect Picture television platform, one destined I believe to replace 2D TV.”
“We are here to introduce a 3D technological advancement, which marries the classical 3D left/ right stereo pair, with a Math augmented, Depth Meta Data (DMD) approach. The addition of DMD to the stereo pair, results in an interactivityy giving the operator mastery over the 3D image. For the first time we can demonstrate an on the fly, real time, intervention with the 3D video signal path.
“What we have is a methodology of video signal integration with PC driven algorithms that support an ability to control signal parameters, which determine depth visuals on a variety of Auto Stereoscopic Displays. The 3DFMax DMD Algorithm approach mines the stereo depth information and converts it to META data which is inserted as the right field of the frame, replacing the right view, as a gray scale mapping.
“This data is auto converted by our Firmware, on the fly into 9 Multiviews as the key to the pixel per pixel orientation for the lenticular lens or lenticule, thereby controlling the depth cues. One 3DFmax video frame is composed of the left field as a full resolution view, with the Right field operating as a lightweight DMD map which may be re-rendered in real time, visible on the 3DFMax ASD screen, thereby providing instant correction and adjustment to the images depth visual cues.
He further said: “This is not your grand pa’s 3D, it is the beginning of 3D’s disruptive impact on all 2D video imaging technologies. To support this end, our 3DFMax ASD solution is Agnostic and is designed for Universal applications, as both our IP hardware and software are broad based, and are adaptable to solving a wide variety of ASD problems.”
3DFusion has re-invented the DMD approach, and filed IP based on an algorithmic manipulation of the Depth Meta Data, which it has branded under the, “ 3DFMax” trademark.
Blumenthal continued: “Most of the 3D pundits agree that if 3DTV is ever to replace 2D, as a mass market, consumer electronics item it must be glasses free, address and solve all of the competitive features available of 2d, and be a seamless replacement for the Television industries production and distribution infrastructure.
“3DFusion was formed to address this task. And I am proud to say, that as the inventors the of the 3DFMax, image optimization technology, Ilya and I, with a great team of artist and engineers, as of last week, have in fact, completed this task.
“3DFusion is here today to introduce to you, a 3DTV glasses free, Broadcast Quality Standard, perfect picture, 3D technological advancement of significant industry and market impact, which is not years away.”
The company is looking for investors and strategic partners to make this technology available for widespread vertical market applications.
I have contacted Steve and hope to speak directly with him. Should I do, you will hear it all, right here!
Brocade launches VDX switches for virtualized and cloud-optimized data centers
Brocade recently launched what it claims is the industry's first true Ethernet fabric switching solutions that are purpose-built for highly virtualized and cloud-optimized data centers.
Its VDX product family of Ethernet fabric switches makes use of Virtual Cluster Switching (VCS) technology. These are based on a scaled virtualized environment without adding network complexity, and enables building flexible, open and hypervisor-agnostic networks.
Brocade also launched the VDX 6720 switches – the first in VDX family. These feature 10 GbE wire-speed, low latency, LAN/SAN convergence. They run on sixth generation fabric ASIC and proven O/S technology. The key thing -- you pay as you grow ports-on demand and low power usage.
What's new?
So, what's new about this switch? Rajesh Kaul, country manager, Brocade, said: "The technology underlying the Ethernet fabric -- it has all of the resiliences of the fiber fabric and all of the simplicity of Ethernet built on to it.
"Every point of the network is connected to every other point on the network -- rather than the classical Ethernet. Also, we don't use spamming tree protocol (STP). We use the TRILL protocol. In this case, every path is active."
As per Brocade, it is working with the Internet Engineering Task Force (IETF) on a standard called Transparent Interconnection of Lots of Links (TRILL). This provides multiple paths via load splitting. TRILL will allow reclaiming network bandwidth and improve the utilization by establishing the shortest path through Layer 2 networks and spreading traffic more evenly. Hence, the network can respond faster to failures.
Kaul added that these devices act on a layer 2 level. "Every device is intelligent and a master device. So, this is a masterless switch."
Its VDX product family of Ethernet fabric switches makes use of Virtual Cluster Switching (VCS) technology. These are based on a scaled virtualized environment without adding network complexity, and enables building flexible, open and hypervisor-agnostic networks.
Brocade also launched the VDX 6720 switches – the first in VDX family. These feature 10 GbE wire-speed, low latency, LAN/SAN convergence. They run on sixth generation fabric ASIC and proven O/S technology. The key thing -- you pay as you grow ports-on demand and low power usage.
What's new?
So, what's new about this switch? Rajesh Kaul, country manager, Brocade, said: "The technology underlying the Ethernet fabric -- it has all of the resiliences of the fiber fabric and all of the simplicity of Ethernet built on to it. "Every point of the network is connected to every other point on the network -- rather than the classical Ethernet. Also, we don't use spamming tree protocol (STP). We use the TRILL protocol. In this case, every path is active."
As per Brocade, it is working with the Internet Engineering Task Force (IETF) on a standard called Transparent Interconnection of Lots of Links (TRILL). This provides multiple paths via load splitting. TRILL will allow reclaiming network bandwidth and improve the utilization by establishing the shortest path through Layer 2 networks and spreading traffic more evenly. Hence, the network can respond faster to failures.
Kaul added that these devices act on a layer 2 level. "Every device is intelligent and a master device. So, this is a masterless switch."
Saturday, November 20, 2010
Is enough being done for Indian industry-academia collaboration in VLSI education?
Do you, as a semiconductor/VLSI/EDA company, run university or educational programs for colleges and institutes? Am sure, you do!
Well, are you providing these various colleges and institutes with the latest tools and EDA software? Perhaps, yes! So, do you regularly check whether your tool is being used properly, or at all? What do you do if the tool remains unopened or unused? Okay, before all of that, are you even guiding the faculty and students to tackle real world problems associated with chip design?
Do the students (and the faculty) know the intricacies of 22nm, 32nm, 45nm, and so on? Are you able to assist students in taping out? Right, is the syllabus taught in all of these colleges good enough to produce the kind of talent and skills that the semiconductor/VLSI industry requires currently, and in the future? Is everything being taught, the latest?
As they say — it takes two to tango… and, it takes two hands to clap! To the Indian academia — how many among you are “really” serious about being trained on a regular basis by the semicon/VLSI/EDA industry? What have you all done about it so far, all of these years? How many colleges and institutes among you (and do you) regularly put up or raise your hand to the industry and say — we lack the knowledge in a particular area and need training – please help us!
The question is: what are you, as a semicon/VLSI/EDA company, doing about training the various faculty and the students in various colleges and institutions across India? Do you have a proper program in place for this activity? Well, is enough being done regarding the industry-academia collaboration in VLSI education in India? What more needs to be done?
Are you, as a college or institute teaching VLSI, happy with the quality of talent coming out? Are you really satisfied with the quality of B.Tech/M.Tech projects? Do you seek industry’s help regarding training on a regular basis? What steps do you take to reach out to them? And, what are you doing about it all? Do you take that initiative seriously?
For that matter, are there easy-to-use systems that enable effective and industry-relevant education? Are those being made use of properly? Can entry barriers be lowered for students and faculty so they can explore an IP idea that has business potential? How many of the colleges have done this? I know of some folks trying to develop such solutions, but that’s a separate story for another day!
Coming back on track, apparently, some semicon companies and few well known Indian institutes are really exceeding themselves, but the same story does not hold true everywhere. Why is it so?
There could be a variety of reasons, and not all are listed here. Is it a lack of initiative on part of the industry and the institutes? Don't they even talk to each other? Are institutes not able to approach semicon companies and vice versa? Or, is it the locations of the institutes themselves? Is it that not all institutes are concerned about teaching their students how to solve real world chip design problems?
An industry friend had once remarked: As of the last three-four years, students from the Eastern part of India have no clear pathway that they can pursue to get into VLSI design. The reasons are -- there are no training institutes in the East, which can teach Synopsys or Cadence tools or even the basics of Xilinx FPGA design.
A very interesting panel discussion titled Forging win-win industry-academia collaboration in VLSI education was held during the Cadence CDNLive India University conference.
Moderated by Dr. C.P. Ravikumar, technical director, University Relations, TI India, the panelists were Dr. Ajit Kumar Panda from NIST Behrampur, K Krishna Moorthy, MD, National Semiconductor India, Dr K. Radhakrishna Rao, head, analog training, TI. India and R. Parthasarathy, MD, CADD Centre.
I have already covered Dr. Ravikumar's remarks separately.
Let's see what the other panelists have to say about all of this, and whether they have answers to all of the questions or problems. Well, this is another long post, so please bear with me! ;)
Well, are you providing these various colleges and institutes with the latest tools and EDA software? Perhaps, yes! So, do you regularly check whether your tool is being used properly, or at all? What do you do if the tool remains unopened or unused? Okay, before all of that, are you even guiding the faculty and students to tackle real world problems associated with chip design?
Do the students (and the faculty) know the intricacies of 22nm, 32nm, 45nm, and so on? Are you able to assist students in taping out? Right, is the syllabus taught in all of these colleges good enough to produce the kind of talent and skills that the semiconductor/VLSI industry requires currently, and in the future? Is everything being taught, the latest?
As they say — it takes two to tango… and, it takes two hands to clap! To the Indian academia — how many among you are “really” serious about being trained on a regular basis by the semicon/VLSI/EDA industry? What have you all done about it so far, all of these years? How many colleges and institutes among you (and do you) regularly put up or raise your hand to the industry and say — we lack the knowledge in a particular area and need training – please help us!
The question is: what are you, as a semicon/VLSI/EDA company, doing about training the various faculty and the students in various colleges and institutions across India? Do you have a proper program in place for this activity? Well, is enough being done regarding the industry-academia collaboration in VLSI education in India? What more needs to be done?
Are you, as a college or institute teaching VLSI, happy with the quality of talent coming out? Are you really satisfied with the quality of B.Tech/M.Tech projects? Do you seek industry’s help regarding training on a regular basis? What steps do you take to reach out to them? And, what are you doing about it all? Do you take that initiative seriously?
For that matter, are there easy-to-use systems that enable effective and industry-relevant education? Are those being made use of properly? Can entry barriers be lowered for students and faculty so they can explore an IP idea that has business potential? How many of the colleges have done this? I know of some folks trying to develop such solutions, but that’s a separate story for another day!
Coming back on track, apparently, some semicon companies and few well known Indian institutes are really exceeding themselves, but the same story does not hold true everywhere. Why is it so?
There could be a variety of reasons, and not all are listed here. Is it a lack of initiative on part of the industry and the institutes? Don't they even talk to each other? Are institutes not able to approach semicon companies and vice versa? Or, is it the locations of the institutes themselves? Is it that not all institutes are concerned about teaching their students how to solve real world chip design problems?
An industry friend had once remarked: As of the last three-four years, students from the Eastern part of India have no clear pathway that they can pursue to get into VLSI design. The reasons are -- there are no training institutes in the East, which can teach Synopsys or Cadence tools or even the basics of Xilinx FPGA design.
A very interesting panel discussion titled Forging win-win industry-academia collaboration in VLSI education was held during the Cadence CDNLive India University conference.
Moderated by Dr. C.P. Ravikumar, technical director, University Relations, TI India, the panelists were Dr. Ajit Kumar Panda from NIST Behrampur, K Krishna Moorthy, MD, National Semiconductor India, Dr K. Radhakrishna Rao, head, analog training, TI. India and R. Parthasarathy, MD, CADD Centre.
I have already covered Dr. Ravikumar's remarks separately.
Let's see what the other panelists have to say about all of this, and whether they have answers to all of the questions or problems. Well, this is another long post, so please bear with me! ;)
Friday, November 19, 2010
Cadence VLSI certification program (CVCP) aims to deliver ‘industry grade’ graduates
Cadence Design Systems presented a curtain raiser on the Cadence VLSI Certification Program (CVCP) during the CDNLive India University conference. The availability of trained manpower holds the key to sustained growth. Also, the first thing required to build a good product is to have a good design. Hence, the need for good chip designers.
Cadence already has over 300 program participant institutes in India. The company regularly conducts ‘train the trainer’ programs as well. This program has so far witnessed the tapeouts of five chips and includes IPs from 14 colleges.
Cadence has also started additional strategic programs. First, finishing schools — initiatives with some universities and Indian semiconductor houses. These have been established to bridge the skill gap. Cadence has seen some success in Hyderabad and Bangalore. It has also contributed to the industry demand of manpower. Cadence also has the Orcad training program.
Joint development activity has been happening within the industry-academia to provide a consistent quality of curriculum and develop broader penetration.
The enablers/catalysts are industry veterans, who accept their social responsibility of training upcoming engineers. Some of the first movers aer already Cadence’s training partners.
CVCP initiative
Cadence’s CVCP has been launched with objective of delivering graduates that are ‘industry grade’. It will also provide an incremental training approach, leading up from VLSI fundamentals to industry relevant skills.
The industry relevant leading edge course work has been developed and proven through various programs such as the Cadence-Brazil initiative. Graduates will undergo hands-on guided development projects. The CVCP’s duration is of 214 hours spread over six months. It offers the following:
* MTEch in VLSI.
* MTech in digital electronics.
* MTech in embedded systems.
* BE/BTech in ECE, EE, TC.
The course will be running concurrent to the ongoing degree. Cadence owns the course, which is delivered by CCTP with support from CDNS. NIST, Berhampur, in Orissa, is the first participant in the CVCP with a batch of 60 students.
Cadence already has over 300 program participant institutes in India. The company regularly conducts ‘train the trainer’ programs as well. This program has so far witnessed the tapeouts of five chips and includes IPs from 14 colleges.
Cadence has also started additional strategic programs. First, finishing schools — initiatives with some universities and Indian semiconductor houses. These have been established to bridge the skill gap. Cadence has seen some success in Hyderabad and Bangalore. It has also contributed to the industry demand of manpower. Cadence also has the Orcad training program.
Joint development activity has been happening within the industry-academia to provide a consistent quality of curriculum and develop broader penetration.
The enablers/catalysts are industry veterans, who accept their social responsibility of training upcoming engineers. Some of the first movers aer already Cadence’s training partners.
CVCP initiative
Cadence’s CVCP has been launched with objective of delivering graduates that are ‘industry grade’. It will also provide an incremental training approach, leading up from VLSI fundamentals to industry relevant skills.
The industry relevant leading edge course work has been developed and proven through various programs such as the Cadence-Brazil initiative. Graduates will undergo hands-on guided development projects. The CVCP’s duration is of 214 hours spread over six months. It offers the following:
* MTEch in VLSI.
* MTech in digital electronics.
* MTech in embedded systems.
* BE/BTech in ECE, EE, TC.
The course will be running concurrent to the ongoing degree. Cadence owns the course, which is delivered by CCTP with support from CDNS. NIST, Berhampur, in Orissa, is the first participant in the CVCP with a batch of 60 students.
Forging win-win industry-academia collaboration in VLSI education
Despite all the talk of semicon/VLSI going around in India, is the correct curriculum really being taught in the various institutes? Is the academia able to prepare students to be better equipped to tackle today’s world’s problems? Does the student have sufficient skills that the Indian (and global) semicon industry recruiters are looking for? Is the student, and the academia semiconductor-industry ready sufficiently?
There was a lively panel discussion titled: Forging win-win industry-academia collaboration in VLSI education during the post lunch session of CDNLive India University conference.
I remember last year’s CDNLive India panel discussion quite clearly! There was an entertaining session on how to prepare the students to be semiconductor industry read. It remains a top read till date!
This year’s panel discussion was moderated by Dr. C.P. Ravikumar, technical director, University Relations, Texas Instruments India.
The panelists were:
* Prof Ajit Kumar Panda, NIST Behrampur, Orissa.
* K Krishna Moorthy, MD, National Semiconductor India
* Dr K. Radhakrishna Rao, head, analog training, TI.
* R. Parthasarathy, managing director, CADD Centre.
Starting the discussion, Dr. Ravikumar said that the semicon industry is currently seeing fast paced growth. New knowledge is getting added every year. The semicon industry has been present in India for over 25 years now, and counting.
There is a varied expectations from the academia in India. For instance, should they teach fundamentals or skills? Do they have silicon experience, or can the institute bring this about on its own? What is important — going up or down the abstraction level?
Or, should VLSI education be introduced at the graduate level or should it be in the Masters leel? There are several gaps in the curriculum itself. What can the industry do about those gaps?
Dr. Ravikumar said: “TI is celebrating 25 years. The kinds of problems TI is working on today are vastly different from the times when it had started in India. Today, it is doing large SoCs. The industry has hige expectations from the academia.
People, he added. seem to have diverse opinion on VLSI. Even at abstraction levels, we can talk about power, circuit design, larger blocks, etc. You will likely hear different sort of viewpoints depending on who you are talking to.
He said: “A lot of effort is being put into the formation of new M Tech programs in VLSI across various institutes. Wheher the students passing out from these institutes will find employment in the Indian semiconductor industry- is also a point of debate. Again, I’ve seen VLSI being talked about in the graduate level as well.”
Since there were four panelists, I shall add their views in a separate post. Stay tuned, folks!
There was a lively panel discussion titled: Forging win-win industry-academia collaboration in VLSI education during the post lunch session of CDNLive India University conference.I remember last year’s CDNLive India panel discussion quite clearly! There was an entertaining session on how to prepare the students to be semiconductor industry read. It remains a top read till date!
This year’s panel discussion was moderated by Dr. C.P. Ravikumar, technical director, University Relations, Texas Instruments India.
The panelists were:
* Prof Ajit Kumar Panda, NIST Behrampur, Orissa.
* K Krishna Moorthy, MD, National Semiconductor India
* Dr K. Radhakrishna Rao, head, analog training, TI.
* R. Parthasarathy, managing director, CADD Centre.
Starting the discussion, Dr. Ravikumar said that the semicon industry is currently seeing fast paced growth. New knowledge is getting added every year. The semicon industry has been present in India for over 25 years now, and counting.
There is a varied expectations from the academia in India. For instance, should they teach fundamentals or skills? Do they have silicon experience, or can the institute bring this about on its own? What is important — going up or down the abstraction level?
Or, should VLSI education be introduced at the graduate level or should it be in the Masters leel? There are several gaps in the curriculum itself. What can the industry do about those gaps?
Dr. Ravikumar said: “TI is celebrating 25 years. The kinds of problems TI is working on today are vastly different from the times when it had started in India. Today, it is doing large SoCs. The industry has hige expectations from the academia.
People, he added. seem to have diverse opinion on VLSI. Even at abstraction levels, we can talk about power, circuit design, larger blocks, etc. You will likely hear different sort of viewpoints depending on who you are talking to.
He said: “A lot of effort is being put into the formation of new M Tech programs in VLSI across various institutes. Wheher the students passing out from these institutes will find employment in the Indian semiconductor industry- is also a point of debate. Again, I’ve seen VLSI being talked about in the graduate level as well.”
Since there were four panelists, I shall add their views in a separate post. Stay tuned, folks!
What does it take to be an entrepreneur!
Why exactly do (or did) you choose to become an entrepreneur? Do you have a brilliant product idea? Do you see a large unmet opportunity for your idea?Or, did you leave your job and become an entrepreneur as you either hated your boss or job? Did you think it is fashionable to be on your own? Did you think you could become a ‘trend setter’? Will a VC fund that great idea of yours? Is that idea going to be sustainable in the long run? Well, the reason could just about be anything!
Rajesh Subramaniam of Walden India Advisors Pvt Ltd presented an interesting talk on ‘What does it take to be an entrepreneur’ during the CDNLive India University conference — apparently aimed at the several students among the audience.
Ideation and execution
The first thing as an entrepreneur is to have clear ideation and execution. Ideation and a clear path to execution are the most important attributes to get you started. The idea should be conceived from a real gap that exists in the system, and not what you perceive it to be! Also, it is advised that you always stay with demand, not supply.
Subramanian advised budding entrepreneurs to talk to as many people to see validity of your hypothesis. If you cannot sell your product, then nobody can. Also, if it is not scalable, it is not going to get out of your garage.
Also, you are not going to cut much ice in case you turn out to be a ‘me-too’ company. Always look for that differentiator! Finally, God is in execution — as they say: “In God we trust, the rest we check.”
Choose your team wisely
It is important that as an entrepreneur, you choose your team wisely. It is never a one-man show. Having a good team is the most important thing. A good team can make ‘not such a good idea’ work great. Also, your team should echo your passion and company roadmap.
The interests of your team members should be aligned with the growth of the company. and not independent of it. Also, they should be committed to you and the company through the journey — good and bad. Your worst nightmare — your key empolyees/founders leaving you in the time of crisis.
Manage yourself
Next, it is key that you as an entrepreneur, learn to manage yourself. Treat the company as a company, not as an image of your own self. Do not do everything on your own — you cannot be CEO/COO/CFO/CTO/office attendant and so on. Next, it is not important to be the CEO of your company. If you think that someone else can do a better job, get that person on board.
Listen, listen and keep listening. Take inputs from friends, customers and your own team. Be open minded and receptive to feedback. Also, never get emotionally attached. Learn when to let go — very important.
If something is not working, then it is just NOT working. Stop it right there, and try something else to make it work.
Rework budgeting as many times as you can. It is better to be prepared for the worst case than burn your capital, anticipating the best case, when signals are otherwise. Learn to be responsible as it is not just your neck on the line. Finally, don’t have an ‘ostrich policy’.
Thursday, November 18, 2010
Creating commercial IP in academic community
“The only community that can develop IP for the next generation is the academia and institutes,” said Dr Rajat Gupta, managing director, Beceem Communications Pvt Ltd, while presenting the guest keynote during the CDNLive India 2010 University Conference.India is currently an attractive market. Its 50 million+ middle class can well become the preferred target for all product companies in the world. In this context, what can the academic community do to stimulate product development in India? And, how can they engage in early technology development?
Further, can this large resource pool be mobilized to collaborate to create a massive IP ecosystem that is both commercial and free?
He said: “If there is wide ranging collaboration within the academia, the current duplication that’s happening can go away. This collaboration can also become a vehicle for a different type of industry-academia collaboration.
“Unless we are able to create a basic ecosystem, we cannot get there. Unfortunately, leading edge work in VLSI does not happen that much in India at the moment. We need to make that happen.”
Understanding layers in IP creation
Gupta enlightened the audience about understanding the multiple layers involved in IP creation. For instance, in foundation IP, standard cell library and I/O library are at the core. Once you start building, people will realize that there are lots of interesting things to learn.
Then you have macro IPs — memories; OSC, PLL, POR, BGR, etc; uP, uC; assemblers, compilers, etc. Again, there are lots of things to learn here as well. Once the academia started developing macro IPs, industry experts would be willing to help solve problems.
Next, there are methodology IPs — technology (DRC, ERC, EDA, etc); speed, power, variability, handlng; verification, test, qualificaton, validation. I/F (interface) IP involves things such as memory controllers and PHY; USB, MII, SIDO, etc; display, etc. Then, the IP framework itself — which involves legal and licensing + protection, SoC integration, support and IP renewal.
Gupta advised the academia: “If standard cell libraries can be built, they can also be shared among the universities. Colleges can also get togetther and build on and around technologies (methodology IP). The various IP layers need to be addressed. Some things here are catching up, while some others are not.
“You do not have to develop everything to produce a chip as there would be collaborative output. Academia should drive industry, and not be driven by the industry.”
Finally, some framework should also have to be set up (IP framework) for the IPs. Then, the other aspect is integration. Many problems are not solved at the library level. For eg., ESD. Guidelines can also be a part of the framework. Also, if there is a problem, there should be a commitment that the problem should be fixed.
He said: “The academia today is a large resource, but it is transient. There used to be scientific officers in the In IITs (Indian Institute of Technology). These people can act as the continuity folks within such an IP framework. VLSI is in the business of building ‘highways.’ This is that highway. I’ would also create a certain layer of abstraction. It would also create higher level IPs on top of this.”
Pressing need to build capabilities in universities: Jaswinder Ahuja
CDNLive India held its University Conference today. Welcoming the delegates — largely made up of faculty members from various institutes across India and students, Jaswinder Ahuja, corporate VP and MD, Cadence Design Systems (I) Pvt Ltd, highlighted that there are over 300 universities in India that have access to Cadence’s EDA software.Dwelling on how Cadence went about developing its University program in India, he said that the EDA vendor first started its faculty training program. “As a next step, we wanted the students to develop some real designs, and to innovate. So, we launched the Cadence Design Contest. We have had this for five to six years now. This year, we split the contest into Masters and Bachelors levels.” Cadence started the University conference last year.
Ahuja re-iterated, “It is important that we develop a community — where the faculty and students come together and share their experiences.” A visiting professor from Gerrmany shared his experiences in Europe during last year’s CDNLive India University conference.
Challenges in university ecosystem
Ahuja added: “This year, we have started the Cadence VLSI Certification Program (CVCP). The whole idea is to ensure is that through the curriculum, labs and the like, we can help the student to be industry ready from day one!
“Right now, it takes anywhere from six months to two years to achieve that — which s simply, productive time lost. Our goal is to build capabilities in the universities. We also have two pilots going on under CVCP. Once those are over, we will be ready to scale up.
“One of the challenges that we face when we look at the university ecosystem today — the faculty is the backbone of the academic infrastructure. It is important that the faculty is world class. If some of our best and briightest don’t make the choice to be part of faculty, then the entire industry is at threat. Those who have the passion to teach and impart education, should definitely stick around.”
He noted that the government of India is also very keen on investing in education. That’s going to improve prospects for higher education and for those who would want to get into the education field. It is said that some of the bills that have to be passed in the Indian Parliament are built around enhancing and growing higher education.
VLSI industry prospects
On the VLSI industry, Ahuja said: “About the VLSI industry itself, it has the most exciting prospects over the next 20 years. The consumption of electronics is pervasive and that is only growing. Unfortunately, most of the electronics today is being imported. This could turn out to be a massive challenge for our country.
“The government has taken note of this. There are policies in place that are aimed at improving the R&D, reseach, and even manufacturing in the country.”
Ahuja concluded that Cadence as a company is committed to working with the universities, the faculty and the students to fuel the engine of growth.
“We are committed to staying on this track and expand it further. I’d like to see a collaboration between the universities and research agencies. Today, we are not ready yet! Once we have a strong, thriving network, we would like to connect it to Europe and the US.”
Wednesday, November 17, 2010
Semicon/EDA industry needs to figure out how to use the social media!
At the fag end of day 1 of CDNLive India 2010, I had the opportunity to interact with John Bruggeman, CMO, Cadence Design Systems and Rahul Arya, director, marketing and technology sales, Cadence Design Systems (I) Pvt Ltd.
A week ago, I’d written a post: Is social media really helping semicon/VLSI firms? Of course, there was a session organized by EDA Consortium (EDAC), titled: Does Social Media Reach the Engineers You Want or Waste Your Time?
Having earlier had a chat with Karen Bartleson, a panelist at the EDAC event, I thought it best to get John’s views on some of the issues, since the EDAC panel had representation from Cadence (it wasn’t John) as well!
Lot more needs to be done on social sites
First, it is well known that the adoption of social media is at its infancy in the semicon.VLSI industry. In some other industries, the adoption is much faster. Why has it been this way, so far?
Bruggeman said: “We have an ageing population in our design community, more so than the other technology industries. So, we have been slower in adopting. The pickup on Twiter has been slow.
“We need to do whatever we can do to accelerate. We have heavily invested in bloggers and are also into driving social media. Cadence has two bloggers on staff. The blogs are promising. However, in some of the social sites, a lot more needs to be done.” That’s quite honest!
Are you building communities?
So, how are semicon/VLSI firms using the social media to build communities? Are you building or attempting to build communities? What is that particular community doing?
He added: “We need to figure out how, as an industry, should we use social media. How do you get a community of users to engage in an open dialog? We haven’t got anywhere near at developing a community. We also have to expand beyond blogging.”
Is the social media really helping reach out to design engineers? Are companies hiring via social media sites?
According to Bruggeman, every recruiter of note is now involved in LinkedIn. “Hirings are happening there. Design engineers are also going there to get hired, and not merely for free exchange of information. This is where engineers can talk to engineers,” he noted. “However, it will be interesting to see whether a commuity can be developed. So far, social media has managed to reach out to design engineers only a little bit.”
Social media managers
What about the social media managers themselves? What are companies doing about that?
Bruggeman added that Cadence has hired a manager who is ‘engrained’ into the social media. ”Social media is fascinating. We need younger guys to handle social media.There have to be new ideas and new thoughts.”
Why so many press releases?
Now, having been a tech journalist all my life, I know very well that companies bombard folks like us with press releases!
Are such companies really able to achieve whatever they have set out to achieve? Is it the quality or quantity of coverage? Why are press releases also appearing as links on social media?
Bruggeman said: “EDA companies continue to follow traditional, old school marketing. Lsst year, we (Cadence) had 325 press releases. This year, in H1, we had 44. We are starting to identify that certain marketing things should be used to do certain marketing things! As an industry we under appreciate the value of marketing.”
There you have it! Why is marketing still under appreciated? Semicon/VLSI/EDA is really a tough industry. However, if you make the effort to build a community, they will come! Here, some level of marketing is definitely in order, to make that happen.
“We use the social media to offload all of the things that used to be press releases. We track all coverage. Otherwise, we do seven different kinds of press releases,” he continued.
Get others (bloggers, etc.) to blow your trumpet!
Finally, what about blogs themselves? Why are corporate blogs still not viewed with some trust? What if others blogged for you?
Bruggeman agreed: “Why don’t we allow the customer, or the product manager, or someone else to blog? Customers can ask questions and get answers! We made a major shift. We are creating an environment that’s supportive and open for engineers to share.
A week ago, I’d written a post: Is social media really helping semicon/VLSI firms? Of course, there was a session organized by EDA Consortium (EDAC), titled: Does Social Media Reach the Engineers You Want or Waste Your Time?Having earlier had a chat with Karen Bartleson, a panelist at the EDAC event, I thought it best to get John’s views on some of the issues, since the EDAC panel had representation from Cadence (it wasn’t John) as well!
Lot more needs to be done on social sites
First, it is well known that the adoption of social media is at its infancy in the semicon.VLSI industry. In some other industries, the adoption is much faster. Why has it been this way, so far?
Bruggeman said: “We have an ageing population in our design community, more so than the other technology industries. So, we have been slower in adopting. The pickup on Twiter has been slow.
“We need to do whatever we can do to accelerate. We have heavily invested in bloggers and are also into driving social media. Cadence has two bloggers on staff. The blogs are promising. However, in some of the social sites, a lot more needs to be done.” That’s quite honest!
Are you building communities?
So, how are semicon/VLSI firms using the social media to build communities? Are you building or attempting to build communities? What is that particular community doing?
He added: “We need to figure out how, as an industry, should we use social media. How do you get a community of users to engage in an open dialog? We haven’t got anywhere near at developing a community. We also have to expand beyond blogging.”
Is the social media really helping reach out to design engineers? Are companies hiring via social media sites?
According to Bruggeman, every recruiter of note is now involved in LinkedIn. “Hirings are happening there. Design engineers are also going there to get hired, and not merely for free exchange of information. This is where engineers can talk to engineers,” he noted. “However, it will be interesting to see whether a commuity can be developed. So far, social media has managed to reach out to design engineers only a little bit.”
Social media managers
What about the social media managers themselves? What are companies doing about that?
Bruggeman added that Cadence has hired a manager who is ‘engrained’ into the social media. ”Social media is fascinating. We need younger guys to handle social media.There have to be new ideas and new thoughts.”
Why so many press releases?
Now, having been a tech journalist all my life, I know very well that companies bombard folks like us with press releases!
Are such companies really able to achieve whatever they have set out to achieve? Is it the quality or quantity of coverage? Why are press releases also appearing as links on social media?
Bruggeman said: “EDA companies continue to follow traditional, old school marketing. Lsst year, we (Cadence) had 325 press releases. This year, in H1, we had 44. We are starting to identify that certain marketing things should be used to do certain marketing things! As an industry we under appreciate the value of marketing.”
There you have it! Why is marketing still under appreciated? Semicon/VLSI/EDA is really a tough industry. However, if you make the effort to build a community, they will come! Here, some level of marketing is definitely in order, to make that happen.
“We use the social media to offload all of the things that used to be press releases. We track all coverage. Otherwise, we do seven different kinds of press releases,” he continued.
Get others (bloggers, etc.) to blow your trumpet!
Finally, what about blogs themselves? Why are corporate blogs still not viewed with some trust? What if others blogged for you?
Bruggeman agreed: “Why don’t we allow the customer, or the product manager, or someone else to blog? Customers can ask questions and get answers! We made a major shift. We are creating an environment that’s supportive and open for engineers to share.
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