Xilnx intros six new development kits for Targeted Design Platforms

Xilinx recently announced six new development kits as part of its Targeted Design Platforms (see July 2009 archive).

These kits will enable developers to focus on innovation and differentiation, while designing with FPGAs. The development platforms for Virtex-6 and Spartan-6 FPGA families are said to significantly shorten the time taken to reach the optimal levels of system performance, while ensuring lower levels of power consumption during SoC development.

High development costs are driving ASSPs to ultra high volume markets. There is also a growing ASIC/ASSP application gap. Vamsi Boppana, senior director and CTO, Xilinx India, said new FPGA powered application needs on the horizon include communications, smart grid, automotive infotainment, green IT surveillance, cloud computing, intelligent video, security infrastructure, etc.

Neeraj Varma, country manager, sales, India, Australia and New Zealand, Xilinx India, added that the kits are targeting embedded, DSP and building of systems requiring high-speed serial connectivity by providing design teams with optimized tool suites tuned to their design flow, fully functional IP and Targeted Reference Designs common to their areas of expertise.

In the Virtex-6 series, Xilinx is offering the connectivity kit, the embedded kit, both of whom are available, and the DSP kit -- which will be released in January 2010. In the Spartan-6 series, it is offering the connectivity kit, the embedded kit, both of whom are available, and the DSP kit -- which will be released in March 2010.

The kits support development of designs with Virtex-6 series FPGA family for compute intensive, high-speed, high-density SoC applications, or the Spartan-6 FPGA family for applications where size, power and cost are key considerations, besides performance.

Each kit is supported by an edition of the ISE Design Suite v11.4 (see April 2009 archive), which delivers a 25 percent runtime reduction for Spartan-6 FPGA designs and a 30 percent runtime reduction large, complex and highly utilized Vetex-6 SoC designs over the previous release.

Boppana added that the anatomy of a domain-specific kit includes:
* Scalable development board
– Enable migration up or down in same FPGA package,
– FMC connectors – extend base board functionality, enables ecosystem,
– Pre-configured with working Targeted Reference Design.

* Domain optimized design environment
– ISE Design Suite
> Hardware development flow supporting RTL or block level abstraction
> Embedded software development flow
> Advanced connectivity setup and analysis tools

* Targeted Reference Designs
– Optimized for system performance, power savings, and cost
– Enables system evaluation, performance measurement and analysis

* Complete documentation, source code, and IP cores

Targeted applications for the embedded design kits include wireless baseband and radio, image processing, processor acceleration for Virtex-6 and industrial control/security, automotive control, consumer for Spartan-6. Boppana also touched upon the case study of one of Xilinx's customers -- Tata Elxsi.

Using the pre-verified MicroBlaze processor sub-system with DDR3 memory controller and Gigabit Ethernet, Tata Elxsi was able to get the software up and running on the SP605 board within a few hours. It was also able to witness over 50 percent performance improvement compared to previous generation design.

Target applications for the connectivity design kits include wired communications, video switches, routers, etc. for Virtex-6 and Ethernet routers, industrial control hubs, storage, etc., for Spartan-6. Target applications for the DSP design kits include wireless radio, radar, medical MRI/CT/PET equipment, image recognition, etc., for Virtex-6 and femto/pico cell communications, consumer video, industrial camera, etc., for Spartan-6.

Hence, engineering teams can now finish their designs faster and focus on differentiation. The kits include all the hardware and software that designers need. This includes fully tested/supported Targeted Reference Designs.