Altera intros 28nm Stratix V FPGA family

Altera Corp. has introduced its next-generation 28nm Stratix V FPGA family, said to be the industry’s highest bandwidth FPGA. Offering up to 1.6 Tbps of serial switching capability, Stratix V FPGAs leverage a myriad of new technologies and a leading-edge 28nm process to reduce the cost and power of high-bandwidth applications.Manufactured on TSMC’s 28nm high-performance (HP) process, the Stratix V FPGA family provides up to 1.1 million logic elements (LEs), 53-Mbits embedded memory, 3,680 18×18 multipliers and integrated transceivers operating up to an industry-leading 28 Gbps.

Gangatharan Gopal, country sales manager and office manager for Altera India, said that the FPGAs are suitable for devices used in next-generation high bandwidth systems. According to Altera, these offer 35 percent higher performance than alternative process options, as well as 30 percent lower total power versus other generations. These also enable the fastest and most power efficient transceivers.

He pointed out that Altera has been delivering innovations from the core to the I/O that provide higher system performance at lower cost and power.

Altera’s 28nm Stratix V FPGAs are said to have broken through the bandwidth barrier. The company is also said to be dramatically improving the density and I/O performance of the FPGAs, and further strengthening their competitive position versus ASICs and ASSPs.

Altera’s devices incorporate the industry’s highest level of application-targeted hard intellectual property (IP) for increased system integration and performance without the cost and power penalty.

The FPGA family itself includes four variants that address a broad range of applications in the wireless/wireline communications, military, broadcast, computer and storage, test and medical markets. These variants include:

* Stratix V GT FPGA – Industry’s only FPGA with integrated 28-Gbps transceivers targeting 100G systems and beyond.
* Stratix V GX FPGA – Supports a wide range of applications with 600-Mbps to 12.5-Gbps transceivers.
* Stratix V GS FPGA – Optimized for high-performance digital signal processing (DSP) applications with 600-Mbps to 12.5-Gbps transceivers.
* Stratix V E FPGA – Highest density FPGA ideal for ASIC prototyping, emulation or high-performance computing applications.

New innovations
According to Gopal, Altera’s new innovations are said to be taking the industry beyond the benefits of Moore’s Law. These include embedded HardCopy blocks, partial reconfiguration — a feature said to be announced for the first time, and embedded 28Gbps transceivers.

The 28Gbps transceivers are said to be an industry first. Other features that facilitate these FPGAs to break through the bandwidth barrier include 1.6Tbps serial switching capability, 1,600Mbps DDR3 interfaces and 1,840 GMACS or 1,000 GFLOPS.

The FPGAs are said to deliver higher system performance at lower power and cost with the aid of the industry’s first variable precision DSP block, register-enriched ALM, higher performance embedded RAM architecture, and highest level of hard IP integration on any FPGA. Besides, the Stratix V FPGAs lead the path to HardCopy ASIC.

Gopal also touched upon the increased efficiency and system performance brought about by the new ALM architecture and the new M20K block and MLAB. The ALM architecture allows adding up to 800K additional registers on the largest device. It is ideal for heavily pipelined and register-rich designs. The new M20K block and MLAB facilitate improved area efficiency and higher system performance, as well as 53Mbits of embedded RAM.

Another feature is the embedded HardCopy block, which has 700K logic elements and 14 million ASIC gates. It facilitates 65 percent reduction in power and 2X performance improvement vs. soft logic. Also, it allows three-to-six months turnaround time for new variants to address new target applications.

Some next-generation applications enabled by the Stratix V FPGAs include multi-100G Ethernet line card, multi-device OTN muxponder, replacing ASSPs with a single-chip solution, and replacing DSPs in radar systems.