Tuesday, November 30, 2010

INSIDE Contactless unveils SecuRead NFC solution for mobile handset market

INSIDE Contactless has unveiled SecuRead, a breakthrough NFC solution for the mobile handset market. This chip will be integrated into production handsets by mid-2011.

SecuRead is a complete, system-in-package (SIP) NFC solution that makes it simple for mobile device manufacturers and NFC infrastructure providers to integrate all of the contactless, security and application functions required for a broad range of contactless NFC payment, transit, ID and access control applications.

According to the company, SecuRead features INSIDE’s award-winning MicroRead NFC controller, a high-performance, highly secure SLE 97-family secure element from Infineon, a GlobalPlatform-compliant Java Card OS from Giesecke & Devrient and INSIDE’s Open NFC protocol stack to provide a best-of-breed solution that helps mobile device manufacturers bring rich NFC capabilities to market more quickly.

Loic Hamon, VP of products and marketing for NFC at INSIDE Contactless, said that 2011 will be the inflection point for NFC with over 50Mu devices. There are multiple committed handset ecosystems. Also, there are wireless carrier commitments, consortia, initiatives, etc. Android is now a major market driver – outselling the iPhone.

As for the regional situation, the US is witnessing mobile payment (embedded secure element). Korea is seeing a replacement of T-money (transport, payment, loyalty), UICC based. In Nice, France, there will be multi-carrier, multi-service, UICC-based, national rollout in 2011.

Ecosystem alignments are needed, and business models have to be proven. Also, NFC peripherals will contribute to market acceleration.

Thursday, November 25, 2010

View 3D TV, without glasses, today!

Did you ever want to watch the latest movie or ball game with flawless, immersive 3D images on your 2D LCD screen without using 3D glasses? I sure do! All the time!!

I even suggested to a semicon company recently, which is providing HD media processor SoCs, to highlight a solution, which will allow the man in the street to pick up the DVD of Harry Potter and the Deathly Hallows – Part 1, insert it into the player, and enjoy the movie on his TV in 3D! All of it, without wearing 3D glasses!

Sounds quite far fetched, isn’t it?

3D TV viewing possible on 2D TV, today!
Well, I believe, Stephen Blumenthal, president of 3DFusion, surprised everyone at the Paul Kagan 3D Market Media Conference at Waldorf Astoria Hotel on October 27 last month, when he, along with his partner Ilya Sorokin, invited the audience to visit the 3DFusion business suite, located upstairs in the Waldorf, to experience the picture perfect 3DFMax glasses free 3D ASD, and see a real time, live 3D stereo camera capture display!Steve was kind enough to share his landmark speech with me, as well. First up, many congrats to Steve and 3DFusion!

His opening line itsef is very interesting: “This is a historic day for me, as I started out as a TV repair man from Ithaca NY, and now today, we are introducing for the first time, a 3DTV, glasses free Broadcast Quality, Perfect Picture television platform, one destined I believe to replace 2D TV.”

“We are here to introduce a 3D technological advancement, which marries the classical 3D left/ right stereo pair, with a Math augmented, Depth Meta Data (DMD) approach. The addition of DMD to the stereo pair, results in an interactivityy giving the operator mastery over the 3D image. For the first time we can demonstrate an on the fly, real time, intervention with the 3D video signal path.

“What we have is a methodology of video signal integration with PC driven algorithms that support an ability to control signal parameters, which determine depth visuals on a variety of Auto Stereoscopic Displays. The 3DFMax DMD Algorithm approach mines the stereo depth information and converts it to META data which is inserted as the right field of the frame, replacing the right view, as a gray scale mapping.

“This data is auto converted by our Firmware, on the fly into 9 Multiviews as the key to the pixel per pixel orientation for the lenticular lens or lenticule, thereby controlling the depth cues. One 3DFmax video frame is composed of the left field as a full resolution view, with the Right field operating as a lightweight DMD map which may be re-rendered in real time, visible on the 3DFMax ASD screen, thereby providing instant correction and adjustment to the images depth visual cues.

He further said: “This is not your grand pa’s 3D, it is the beginning of 3D’s disruptive impact on all 2D video imaging technologies. To support this end, our 3DFMax ASD solution is Agnostic and is designed for Universal applications, as both our IP hardware and software are broad based, and are adaptable to solving a wide variety of ASD problems.”

3DFusion has re-invented the DMD approach, and filed IP based on an algorithmic manipulation of the Depth Meta Data, which it has branded under the, “ 3DFMax” trademark.

Blumenthal continued: “Most of the 3D pundits agree that if 3DTV is ever to replace 2D, as a mass market, consumer electronics item it must be glasses free, address and solve all of the competitive features available of 2d, and be a seamless replacement for the Television industries production and distribution infrastructure.

“3DFusion was formed to address this task. And I am proud to say, that as the inventors the of the 3DFMax, image optimization technology, Ilya and I, with a great team of artist and engineers, as of last week, have in fact, completed this task.

“3DFusion is here today to introduce to you, a 3DTV glasses free, Broadcast Quality Standard, perfect picture, 3D technological advancement of significant industry and market impact, which is not years away.”

The company is looking for investors and strategic partners to make this technology available for widespread vertical market applications.

I have contacted Steve and hope to speak directly with him. Should I do, you will hear it all, right here!

Brocade launches VDX switches for virtualized and cloud-optimized data centers

Brocade recently launched what it claims is the industry's first true Ethernet fabric switching solutions that are purpose-built for highly virtualized and cloud-optimized data centers.

Its VDX product family of Ethernet fabric switches makes use of Virtual Cluster Switching (VCS) technology. These are based on a scaled virtualized environment without adding network complexity, and enables building flexible, open and hypervisor-agnostic networks.

Brocade also launched the VDX 6720 switches – the first in VDX family. These feature 10 GbE wire-speed, low latency, LAN/SAN convergence. They run on sixth generation fabric ASIC and proven O/S technology. The key thing -- you pay as you grow ports-on demand and low power usage.

What's new?
So, what's new about this switch? Rajesh Kaul, country manager, Brocade, said: "The technology underlying the Ethernet fabric -- it has all of the resiliences of the fiber fabric and all of the simplicity of Ethernet built on to it.

"Every point of the network is connected to every other point on the network -- rather than the classical Ethernet. Also, we don't use spamming tree protocol (STP). We use the TRILL protocol. In this case, every path is active."

As per Brocade, it is working with the Internet Engineering Task Force (IETF) on a standard called Transparent Interconnection of Lots of Links (TRILL). This provides multiple paths via load splitting. TRILL will allow reclaiming network bandwidth and improve the utilization by establishing the shortest path through Layer 2 networks and spreading traffic more evenly. Hence, the network can respond faster to failures.

Kaul added that these devices act on a layer 2 level. "Every device is intelligent and a master device. So, this is a masterless switch."

Saturday, November 20, 2010

Is enough being done for Indian industry-academia collaboration in VLSI education?

Do you, as a semiconductor/VLSI/EDA company, run university or educational programs for colleges and institutes? Am sure, you do!

Well, are you providing these various colleges and institutes with the latest tools and EDA software? Perhaps, yes! So, do you regularly check whether your tool is being used properly, or at all? What do you do if the tool remains unopened or unused? Okay, before all of that, are you even guiding the faculty and students to tackle real world problems associated with chip design?

Do the students (and the faculty) know the intricacies of 22nm, 32nm, 45nm, and so on? Are you able to assist students in taping out? Right, is the syllabus taught in all of these colleges good enough to produce the kind of talent and skills that the semiconductor/VLSI industry requires currently, and in the future? Is everything being taught, the latest?

As they say — it takes two to tango… and, it takes two hands to clap! To the Indian academia — how many among you are “really” serious about being trained on a regular basis by the semicon/VLSI/EDA industry? What have you all done about it so far, all of these years? How many colleges and institutes among you (and do you) regularly put up or raise your hand to the industry and say — we lack the knowledge in a particular area and need training – please help us!

The question is: what are you, as a semicon/VLSI/EDA company, doing about training the various faculty and the students in various colleges and institutions across India? Do you have a proper program in place for this activity? Well, is enough being done regarding the industry-academia collaboration in VLSI education in India? What more needs to be done?

Are you, as a college or institute teaching VLSI, happy with the quality of talent coming out? Are you really satisfied with the quality of B.Tech/M.Tech projects? Do you seek industry’s help regarding training on a regular basis? What steps do you take to reach out to them? And, what are you doing about it all? Do you take that initiative seriously?

For that matter, are there easy-to-use systems that enable effective and industry-relevant education? Are those being made use of properly? Can entry barriers be lowered for students and faculty so they can explore an IP idea that has business potential? How many of the colleges have done this? I know of some folks trying to develop such solutions, but that’s a separate story for another day!
Coming back on track, apparently, some semicon companies and few well known Indian institutes are really exceeding themselves, but the same story does not hold true everywhere. Why is it so?

There could be a variety of reasons, and not all are listed here. Is it a lack of initiative on part of the industry and the institutes? Don't they even talk to each other? Are institutes not able to approach semicon companies and vice versa? Or, is it the locations of the institutes themselves? Is it that not all institutes are concerned about teaching their students how to solve real world chip design problems?

An industry friend had once remarked: As of the last three-four years, students from the Eastern part of India have no clear pathway that they can pursue to get into VLSI design. The reasons are -- there are no training institutes in the East, which can teach Synopsys or Cadence tools or even the basics of Xilinx FPGA design.

A very interesting panel discussion titled Forging win-win industry-academia collaboration in VLSI education was held during the Cadence CDNLive India University conference.

Moderated by Dr. C.P. Ravikumar, technical director, University Relations, TI India, the panelists were Dr. Ajit Kumar Panda from NIST Behrampur, K Krishna Moorthy, MD, National Semiconductor India, Dr K. Radhakrishna Rao, head, analog training, TI. India and R. Parthasarathy, MD, CADD Centre.

I have already covered Dr. Ravikumar's remarks separately.

Let's see what the other panelists have to say about all of this, and whether they have answers to all of the questions or problems. Well, this is another long post, so please bear with me! ;)

Friday, November 19, 2010

Cadence VLSI certification program (CVCP) aims to deliver ‘industry grade’ graduates

Cadence Design Systems presented a curtain raiser on the Cadence VLSI Certification Program (CVCP) during the CDNLive India University conference. The availability of trained manpower holds the key to sustained growth. Also, the first thing required to build a good product is to have a good design. Hence, the need for good chip designers.

Cadence already has over 300 program participant institutes in India. The company regularly conducts ‘train the trainer’ programs as well. This program has so far witnessed the tapeouts of five chips and includes IPs from 14 colleges.

Cadence has also started additional strategic programs. First, finishing schools — initiatives with some universities and Indian semiconductor houses. These have been established to bridge the skill gap. Cadence has seen some success in Hyderabad and Bangalore. It has also contributed to the industry demand of manpower. Cadence also has the Orcad training program.

Joint development activity has been happening within the industry-academia to provide a consistent quality of curriculum and develop broader penetration.

The enablers/catalysts are industry veterans, who accept their social responsibility of training upcoming engineers. Some of the first movers aer already Cadence’s training partners.

CVCP initiative
Cadence’s CVCP has been launched with objective of delivering graduates that are ‘industry grade’. It will also provide an incremental training approach, leading up from VLSI fundamentals to industry relevant skills.

The industry relevant leading edge course work has been developed and proven through various programs such as the Cadence-Brazil initiative. Graduates will undergo hands-on guided development projects. The CVCP’s duration is of 214 hours spread over six months. It offers the following:
* MTEch in VLSI.
* MTech in digital electronics.
* MTech in embedded systems.
* BE/BTech in ECE, EE, TC.

The course will be running concurrent to the ongoing degree. Cadence owns the course, which is delivered by CCTP with support from CDNS. NIST, Berhampur, in Orissa, is the first participant in the CVCP with a batch of 60 students.

Forging win-win industry-academia collaboration in VLSI education

Despite all the talk of semicon/VLSI going around in India, is the correct curriculum really being taught in the various institutes? Is the academia able to prepare students to be better equipped to tackle today’s world’s problems? Does the student have sufficient skills that the Indian (and global) semicon industry recruiters are looking for? Is the student, and the academia semiconductor-industry ready sufficiently?There was a lively panel discussion titled: Forging win-win industry-academia collaboration in VLSI education during the post lunch session of CDNLive India University conference.

I remember last year’s CDNLive India panel discussion quite clearly! There was an entertaining session on how to prepare the students to be semiconductor industry read. It remains a top read till date!

This year’s panel discussion was moderated by Dr. C.P. Ravikumar, technical director, University Relations, Texas Instruments India.

The panelists were:
* Prof Ajit Kumar Panda, NIST Behrampur, Orissa.
* K Krishna Moorthy, MD, National Semiconductor India
* Dr K. Radhakrishna Rao, head, analog training, TI.
* R. Parthasarathy, managing director, CADD Centre.

Starting the discussion, Dr. Ravikumar said that the semicon industry is currently seeing fast paced growth. New knowledge is getting added every year. The semicon industry has been present in India for over 25 years now, and counting.

There is a varied expectations from the academia in India. For instance, should they teach fundamentals or skills? Do they have silicon experience, or can the institute bring this about on its own? What is important — going up or down the abstraction level?

Or, should VLSI education be introduced at the graduate level or should it be in the Masters leel? There are several gaps in the curriculum itself. What can the industry do about those gaps?

Dr. Ravikumar said: “TI is celebrating 25 years. The kinds of problems TI is working on today are vastly different from the times when it had started in India. Today, it is doing large SoCs. The industry has hige expectations from the academia.

People, he added. seem to have diverse opinion on VLSI. Even at abstraction levels, we can talk about power, circuit design, larger blocks, etc. You will likely hear different sort of viewpoints depending on who you are talking to.

He said: “A lot of effort is being put into the formation of new M Tech programs in VLSI across various institutes. Wheher the students passing out from these institutes will find employment in the Indian semiconductor industry- is also a point of debate. Again, I’ve seen VLSI being talked about in the graduate level as well.”

Since there were four panelists, I shall add their views in a separate post. Stay tuned, folks!

What does it take to be an entrepreneur!

Why exactly do (or did) you choose to become an entrepreneur? Do you have a brilliant product idea? Do you see a large unmet opportunity for your idea?

Or, did you leave your job and become an entrepreneur as you either hated your boss or job? Did you think it is fashionable to be on your own? Did you think you could become a ‘trend setter’? Will a VC fund that great idea of yours? Is that idea going to be sustainable in the long run? Well, the reason could just about be anything!

Rajesh Subramaniam of Walden India Advisors Pvt Ltd presented an interesting talk on ‘What does it take to be an entrepreneur’ during the CDNLive India University conference — apparently aimed at the several students among the audience.

Ideation and execution
The first thing as an entrepreneur is to have clear ideation and execution. Ideation and a clear path to execution are the most important attributes to get you started. The idea should be conceived from a real gap that exists in the system, and not what you perceive it to be! Also, it is advised that you always stay with demand, not supply.

Subramanian advised budding entrepreneurs to talk to as many people to see validity of your hypothesis. If you cannot sell your product, then nobody can. Also, if it is not scalable, it is not going to get out of your garage.

Also, you are not going to cut much ice in case you turn out to be a ‘me-too’ company. Always look for that differentiator! Finally, God is in execution — as they say: “In God we trust, the rest we check.”

Choose your team wisely
It is important that as an entrepreneur, you choose your team wisely. It is never a one-man show. Having a good team is the most important thing. A good team can make ‘not such a good idea’ work great. Also, your team should echo your passion and company roadmap.

The interests of your team members should be aligned with the growth of the company. and not independent of it. Also, they should be committed to you and the company through the journey — good and bad. Your worst nightmare — your key empolyees/founders leaving you in the time of crisis.

Manage yourself
Next, it is key that you as an entrepreneur, learn to manage yourself. Treat the company as a company, not as an image of your own self. Do not do everything on your own — you cannot be CEO/COO/CFO/CTO/office attendant and so on. Next, it is not important to be the CEO of your company. If you think that someone else can do a better job, get that person on board.

Listen, listen and keep listening. Take inputs from friends, customers and your own team. Be open minded and receptive to feedback. Also, never get emotionally attached. Learn when to let go — very important.

If something is not working, then it is just NOT working. Stop it right there, and try something else to make it work.

Rework budgeting as many times as you can. It is better to be prepared for the worst case than burn your capital, anticipating the best case, when signals are otherwise. Learn to be responsible as it is not just your neck on the line. Finally, don’t have an ‘ostrich policy’.

Thursday, November 18, 2010

Creating commercial IP in academic community

“The only community that can develop IP for the next generation is the academia and institutes,” said Dr Rajat Gupta, managing director, Beceem Communications Pvt Ltd, while presenting the guest keynote during the CDNLive India 2010 University Conference.

India is currently an attractive market. Its 50 million+ middle class can well become the preferred target for all product companies in the world. In this context, what can the academic community do to stimulate product development in India? And, how can they engage in early technology development?

Further, can this large resource pool be mobilized to collaborate to create a massive IP ecosystem that is both commercial and free?

He said: “If there is wide ranging collaboration within the academia, the current duplication that’s happening can go away. This collaboration can also become a vehicle for a different type of industry-academia collaboration.

“Unless we are able to create a basic ecosystem, we cannot get there. Unfortunately, leading edge work in VLSI does not happen that much in India at the moment. We need to make that happen.”

Understanding layers in IP creation
Gupta enlightened the audience about understanding the multiple layers involved in IP creation. For instance, in foundation IP, standard cell library and I/O library are at the core. Once you start building, people will realize that there are lots of interesting things to learn.

Then you have macro IPs — memories; OSC, PLL, POR, BGR, etc; uP, uC; assemblers, compilers, etc. Again, there are lots of things to learn here as well. Once the academia started developing macro IPs, industry experts would be willing to help solve problems.

Next, there are methodology IPs — technology (DRC, ERC, EDA, etc); speed, power, variability, handlng; verification, test, qualificaton, validation. I/F (interface) IP involves things such as memory controllers and PHY; USB, MII, SIDO, etc; display, etc. Then, the IP framework itself — which involves legal and licensing + protection, SoC integration, support and IP renewal.

Gupta advised the academia: “If standard cell libraries can be built, they can also be shared among the universities. Colleges can also get togetther and build on and around technologies (methodology IP). The various IP layers need to be addressed. Some things here are catching up, while some others are not.

“You do not have to develop everything to produce a chip as there would be collaborative output. Academia should drive industry, and not be driven by the industry.”

Finally, some framework should also have to be set up (IP framework) for the IPs. Then, the other aspect is integration. Many problems are not solved at the library level. For eg., ESD. Guidelines can also be a part of the framework. Also, if there is a problem, there should be a commitment that the problem should be fixed.

He said: “The academia today is a large resource, but it is transient. There used to be scientific officers in the In IITs (Indian Institute of Technology). These people can act as the continuity folks within such an IP framework. VLSI is in the business of building ‘highways.’ This is that highway. I’ would also create a certain layer of abstraction. It would also create higher level IPs on top of this.”

Pressing need to build capabilities in universities: Jaswinder Ahuja

CDNLive India held its University Conference today. Welcoming the delegates — largely made up of faculty members from various institutes across India and students, Jaswinder Ahuja, corporate VP and MD, Cadence Design Systems (I) Pvt Ltd, highlighted that there are over 300 universities in India that have access to Cadence’s EDA software.

Dwelling on how Cadence went about developing its University program in India, he said that the EDA vendor first started its faculty training program. “As a next step, we wanted the students to develop some real designs, and to innovate. So, we launched the Cadence Design Contest. We have had this for five to six years now. This year, we split the contest into Masters and Bachelors levels.” Cadence started the University conference last year.

Ahuja re-iterated, “It is important that we develop a community — where the faculty and students come together and share their experiences.” A visiting professor from Gerrmany shared his experiences in Europe during last year’s CDNLive India University conference.

Challenges in university ecosystem
Ahuja added: “This year, we have started the Cadence VLSI Certification Program (CVCP). The whole idea is to ensure is that through the curriculum, labs and the like, we can help the student to be industry ready from day one!

“Right now, it takes anywhere from six months to two years to achieve that — which s simply, productive time lost. Our goal is to build capabilities in the universities. We also have two pilots going on under CVCP. Once those are over, we will be ready to scale up.

“One of the challenges that we face when we look at the university ecosystem today — the faculty is the backbone of the academic infrastructure. It is important that the faculty is world class. If some of our best and briightest don’t make the choice to be part of faculty, then the entire industry is at threat. Those who have the passion to teach and impart education, should definitely stick around.”

He noted that the government of India is also very keen on investing in education. That’s going to improve prospects for higher education and for those who would want to get into the education field. It is said that some of the bills that have to be passed in the Indian Parliament are built around enhancing and growing higher education.

VLSI industry prospects
On the VLSI industry, Ahuja said: “About the VLSI industry itself, it has the most exciting prospects over the next 20 years. The consumption of electronics is pervasive and that is only growing. Unfortunately, most of the electronics today is being imported. This could turn out to be a massive challenge for our country.

“The government has taken note of this. There are policies in place that are aimed at improving the R&D, reseach, and even manufacturing in the country.”

Ahuja concluded that Cadence as a company is committed to working with the universities, the faculty and the students to fuel the engine of growth.

“We are committed to staying on this track and expand it further. I’d like to see a collaboration between the universities and research agencies. Today, we are not ready yet! Once we have a strong, thriving network, we would like to connect it to Europe and the US.”

Wednesday, November 17, 2010

Semicon/EDA industry needs to figure out how to use the social media!

At the fag end of day 1 of CDNLive India 2010, I had the opportunity to interact with John Bruggeman, CMO, Cadence Design Systems and Rahul Arya, director, marketing and technology sales, Cadence Design Systems (I) Pvt Ltd.A week ago, I’d written a post: Is social media really helping semicon/VLSI firms? Of course, there was a session organized by EDA Consortium (EDAC), titled: Does Social Media Reach the Engineers You Want or Waste Your Time?

Having earlier had a chat with Karen Bartleson, a panelist at the EDAC event, I thought it best to get John’s views on some of the issues, since the EDAC panel had representation from Cadence (it wasn’t John) as well!

Lot more needs to be done on social sites
First, it is well known that the adoption of social media is at its infancy in the semicon.VLSI industry. In some other industries, the adoption is much faster. Why has it been this way, so far?

Bruggeman said: “We have an ageing population in our design community, more so than the other technology industries. So, we have been slower in adopting. The pickup on Twiter has been slow.

“We need to do whatever we can do to accelerate. We have heavily invested in bloggers and are also into driving social media. Cadence has two bloggers on staff. The blogs are promising. However, in some of the social sites, a lot more needs to be done.” That’s quite honest!

Are you building communities?
So, how are semicon/VLSI firms using the social media to build communities? Are you building or attempting to build communities? What is that particular community doing?

He added: “We need to figure out how, as an industry, should we use social media. How do you get a community of users to engage in an open dialog? We haven’t got anywhere near at developing a community. We also have to expand beyond blogging.”

Is the social media really helping reach out to design engineers? Are companies hiring via social media sites?

According to Bruggeman, every recruiter of note is now involved in LinkedIn. “Hirings are happening there. Design engineers are also going there to get hired, and not merely for free exchange of information. This is where engineers can talk to engineers,” he noted. “However, it will be interesting to see whether a commuity can be developed. So far, social media has managed to reach out to design engineers only a little bit.”

Social media managers
What about the social media managers themselves? What are companies doing about that?

Bruggeman added that Cadence has hired a manager who is ‘engrained’ into the social media. ”Social media is fascinating. We need younger guys to handle social media.There have to be new ideas and new thoughts.”

Why so many press releases?
Now, having been a tech journalist all my life, I know very well that companies bombard folks like us with press releases!

Are such companies really able to achieve whatever they have set out to achieve? Is it the quality or quantity of coverage? Why are press releases also appearing as links on social media?

Bruggeman said: “EDA companies continue to follow traditional, old school marketing. Lsst year, we (Cadence) had 325 press releases. This year, in H1, we had 44. We are starting to identify that certain marketing things should be used to do certain marketing things! As an industry we under appreciate the value of marketing.”

There you have it! Why is marketing still under appreciated? Semicon/VLSI/EDA is really a tough industry. However, if you make the effort to build a community, they will come! Here, some level of marketing is definitely in order, to make that happen.

“We use the social media to offload all of the things that used to be press releases. We track all coverage. Otherwise, we do seven different kinds of press releases,” he continued.

Get others (bloggers, etc.) to blow your trumpet!
Finally, what about blogs themselves? Why are corporate blogs still not viewed with some trust? What if others blogged for you?

Bruggeman agreed: “Why don’t we allow the customer, or the product manager, or someone else to blog? Customers can ask questions and get answers! We made a major shift. We are creating an environment that’s supportive and open for engineers to share.

Tuesday, November 16, 2010

Design-Lite — new model for semiconductor development: Taher Madraswala

Taher Madraswala, VP of Engineering, Open-Silicon Inc., presented the guest keynote titled ‘Moving toward Design-Lite for Innovation’ this afternoon at the ongoing CDNLive India 2010. His mission is clear, “We want our customers to find newer ways of growing their markets.”Madraswala first dwelt on the EDA360 vision and the rise of the applications platform. He also discussed Design-Lite — a new model for semiconductor development, as well as how companies should be using derivaties to extend their market reach, and the new design derivative ecosystem.

On EDA360, he said that the semiconductor product value is now shifting to applications. The shift is providing applications focused platforms. There are also evolving integration challenges in both software and IP.

He added that non-traditional semiconductor development tasks are being pushed to the ecosystem. In this regard, the ecosystem collaboration is critical for success.

He said: “Buying an IP is one thing, but putting it together to develop a product that can be of mass usage is quite another. There was a time when we could add value in doing faster chips, etc. Now, the values have moved elsewhere. Customers also want to change the way they deliver value.”

Madraswala presented the example of Brite Semiiconductor. Open-Silicon had founded Brite in 2008 to brring its methodology to the Chinese market. Yesterday (15/11), Semiconductor Manufacturing International Corp. (SMIC) announced that it has acquired an equity stake in Brite.

Introducing Design-Lite
Today's global economy develops complex systems in a new manner, with design visionaries partnered with subsystem experts and uniquely skilled system integrators. Further, globalization has created the mechanism to optimize every piece of semicon design.

Madraswala introduced a new IC development model -- the Design-Lite. Fabless and fablite companies are using design partners to help get more products out to the market with the same engineering staffing.

He said: "We are currently seeing customers coming to us and start at much higher abstraction levels. We are entering a busines model where customers expect us to desgn from the architecture, right up to mass production."

Industry should enable key capabilities of EDA360: John Bruggeman

Delivering his keynote at the ongoing CDNLive India 2010, John Bruggeman, CMO, Cadence Design Systems, said: “Everything is changing very rapidly in the way you never expected. That was Lip-Bu’s comment. Cadence’s EDA360 is a vision for the industry. EDA360 is a vision — a transformation is underway. This isn’t a vision for Cadence or marketing, but for the entire industry.”According to him, the semiconductor and EDA industries have new and complex problems, and there is a growing need to come together to solve those problems.

Application driven model rules
Touching on application driven models, Bruggeman gave an example of his new TV, which came preloaded with eight applications, such as YouTube, Pandora, NetFlix, etc.

Interestingly, there was also a link within the TV on to the application store where one could buy up to 200 additional applications.

“This is very important – it is at the heart of the fundamental sea change that is happeing in the industry,” he said. “Users want apps. They want to take their devices and want to be able to cusomize those into doing things they are most interested in. Users want their devices to have apps and content that they can customize.”

The fact that one can link to an app store – from either a washing machine or a toaster — that’s the seminal shift!

He added: “The life expantancy of a TV set in North America is 15.1 years. Wouldn’t it be better if I got revenue once every month, or week or day? An application driven model means a continuous revenue model!”

He said that had Nokia started off with such a revenue model, perhaps, it would not be losing market share. Nor would BlackBerry. “That’s why the Apple iPhone and Google Android are gaining. They offer new revenue streams. This is not an anecdote, It is about the industry.”

Android’s growing influence
Bruggeman shared some figures of some leading mobile OS, from last July to this year.

Last July, Symbian had 51 percent share, which has since dropped to 41.2 percent. RIM had 20 percent share in July 2009, which dropped to 18.2 percent in July 2010. The Apple iOS moved up from 13 percent to 14.2 percent.

However, MS Windows Mobile dropped from 9.3 percent in July 2009 to 5 percent in July 2010. Similarly, Linux had dropped from 4.6 percent to 2.4 percent during the same period.

Nevertheless, the same period has witnessed phenomenal growth for the Google Android — from around 1.8 percent share in July 2009 to a significantly higher 17.2 percent share in July 2010. Now, that’s some influence!

Bruggeman added: There are challenges at each layer of design.You will have to deal with new challenges you never faced in the past. We also continue to march on to the next node, as well as to even more lower power.” Consequently, the traditional problems continue to remain and become more challenging, besides the new emergence of new challenges.

The time has now come for the global industry to enable the key capabilities of EDA360!

Semicon industry must be prepared to face challenges in new era: Lip-Bu Tan

Day 1, CDNLive India 2010, kicked of with Lip-Bu Tan, president and CEO, Cadence Design Systems Inc. delivering the main keynote.This is a new era of an application driven platforms and products that have very short time to market. The global semiconductor industry needs to be ready and prepared to face and take on the upcoming challenges.

Talking about the global economy in general, Tan said that there has been gradual GDP growth, and that the semiconductor growth has exceeded GDP growth this year.

Healthy semicon industry
Tan said: “There is cautious investment as well as government engagement. There have been seasonal adjustments in the industry. I see 5-7 percent growth over the next five years. It is a healthy semiconductor industry.”

There has also been some improvement in major capital investment, especially in China and India. The IPO market has also been encouraging, especially in semicon space.

He added that India, especially, is coming up very strong. The domestic market has been coming up quite strong as well. “I am excited about the whole of investment over the next five years.”

Tan advised that various national governments are realizing that the semiconductor is critical, and hence, it is now becoming a significant industry. “China realized that they import more semiconductors than oil. India will realize this fact sooner, rather than later. I am sure that India will also mark semiconductors as a key area.”

On globalization, he added that all companies were now moving toward globalization. Some major companies, such as TI, ST, etc., have experienced tremendous growth in Asia Pacific.

On organizational matters, Tan expressed excitement regarding the amount of innovation and IT education happening in India. “India has all the brains and innovation. Now, the challenge is how to come up with products and market them globally. Tejas is doing very well, so is Cosmic Circiuts. So is Ittiam Systems.” The capital efficiency structure is also gaining in importance.

According to him, the M&A activity is also gaining in importance. “Some of the major system companies are moving into semiconductors, such as Apple,” he observed. A similar pattern was also visible with Oracle. “So, the system guys are starting to move into silicon. The next five years will be exciting as there will be a sea change.

Key market drivers
Coming on to technical aspects of the global semicon industry, some major drivers include the explosion of applications, green technology, cloud computing, mobility, 3D, high definition.

Tan said: “Application development is becoming very important. Also, how do you drive low power across products is very significant. Cloud computing is another big area. VCs are investing in this area. Next, mobility is major. It is no more just about a phone.” On mobility, he further added that India had recently auctioned some wireless spectrum. There will be opportunities in that area.

Social media is changing the game. Video is yet another big piece. You have HD video. There has been lot of proliferation in video. Tan cited an instance where Cisco’s John Chambers had advised that in five years, 80 percent of the company’s traffic will be video. Tan added that 3D is also growing. Smart grid has emerged as a major driver in the Asia Pacific as well.

Monday, November 15, 2010

Look ahead to Oct. 2010 global semicon sales: Cowan LRA model

This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.

October 2010's "actual" global semiconductor sales is scheduled to be released by the WSTS, via its monthly HBR (Historical Billings Report), on or about December 3rd.

(Note - the WSTS will supposedly publish its annual Autumn forecast numbers on Nov 30th. This is a deviation from its past, normal practice when it had been typically released during the middle of November. The SIA's Fall annual forecast announcement was published earlier, on Nov. 4, 2010)

It should be highlighted that October's "actual" sales result will play a role in whether the overall year 2010 sales reaches at least $300 billion thereby achieving a global yearly S/C industry sales breakthrough (historical high).

Anticipating the upcoming October sales release by the WSTS, Cowan wants to demonstrate an analysis feature of the Cowan LRA Model for forecasting worldwide semi sales; namely, the ability to provide a "look ahead" scenario analysis for 2010's global semi sales forecast as a function of next month's (in this case October's) "actual" global semi sales estimate in order to carry out a sensitivity assessment on attaining the $300 billion sales milestone.

The specifics of the scenario analysis are discussed in the following paragraphs and summarized in the scenario analysis matrix table.

In order to demonstrate this capability, an extended range in possible October 2010 "actual" sales was selected; in this particular scenario analysis, a sales range from $22.89 billion to $26.64 billion in increments of $0.25 billion was chosen as listed in the first column of the table.Source: Cowan LRA model.

This estimated range of "actual" sales is "centered around" the projected October sales forecast estimate of $25.143 billion as determined by last month's (based upon September's sales number) model run. The corresponding October 3MMA sales forecast estimate is projected to be $26.65 billion (assuming no or minor revisions to either August's or September's published sales numbers by the WSTS).

The overall year 2010 sales forecast estimate for each of the assumed October sales estimates over the pre-selected range of 'actual' sales estimates is calculated by the model, and is shown in the second column of the table.

The third column reveals the associated yr-o-yr sales growth estimates compared to year 2009's sales result (of $226.3 billion).

The fourth and fifth columns show the corresponding October 3MMA, three Month Moving Average, sales estimate and the related year-on-year sales growth relative to October 2009's 3MMA sales (of $21.963 billion), respectively. Finally, the sixth column lists the model's Momentum Indicator, MI.

Therefore, as the attached scenario analysis table lays out, depending on the actual WSTS to-be-released October 2010 global semi sales number, the forecasted 2010 sales estimate, as determined by the model, could vary between $299.8 billion and $304.3 billion, while the corresponding 2009 to 2010 sales growth estimate would vary between 32.5 percent and 34.5 percent, respectively.

Cowan has purposely extended the selected range of 'actual' October sales numbers downward in order to capture the $300 billion "barrier" as the lower bound in the scenario analysis forecast matrix because of the pivotal role that October's 'actual' sales would play in reaching this milestone sales result.

Note - last month's previously published Cowan LRA Model's 2010 sales growth forecast estimate, which was based upon September 2010's 'actual' sales (of $29.372 billion), came in at 33.7 percent based upon the model's sales forecast estimate of $302.646 billion.

Using this analysis capability, the model provides a "sensitivity output" of the "expected" 2010 sales forecast (and yr-o-yr forecasted sales growth) as a function of the yet-to-be-announced October "actual" sales number.

Therefore, using the table, one can a-priori "select" an October sales number (in the range shown) and immediately see what the model would predict for a 2010 sales forecast estimate along with its corresponding sales growth expectation in advance of the actual (to-be-published) 'actual' October sales number.

Stay tuned for the WSTS to publish (anticipated on December 3rd, 2010) the October 2010 'actual' sales number. One can then easily ascertain the model's latest forecast outlook as abstracted (or extrapolated) from the provided table even before the model is run. Cowan will subsequently publish the updated forecast numbers based upon October's 'actual' sales result.

Wednesday, November 10, 2010

Is social media really helping semicon/VLSI firms?

Right then. In my earlier post, I had highlighted 15 queries on how semicon/VLSI firms associate with social media. Already, I have a comment from Hillol Sarkar, CEO, AgO Inc., in California. Thanks a lot, sir. Friends, please keep all those comments coming! There's no right or wrong answer!

Now, as promised, here's an honest attempt to answer some of the queries. Also, I am thankful to Karen Bartleson, senior director, Community Marketing, Synopsys, for commenting on some of my questions. Thank you for permitting me to use some of those comments.

By the way, Karen is speaking today evening at an EDAC panel discussion aptly titled: Does Social Media Reach the Engineers You Want or Waste Your Time? It has been organized by the EDA Consortium (EDAC) at Doubletree Hotel, San Jose, California. So, if you are somewhere nearby, do listen to what Karen and other panelists have to say. It shoudl be fun! ;)

Let me also indulge in some shameless promotion for a moment! Hey Karen, please don't forget to mention me and these posts, in case you see this! ;)

Now, to address those queries! Please bear with me everyone, as this is quite a long post!

How are firms using social media?
First, how are semicon/VLSI firms using the social media to build communities? Are such firms adopting social media strategies? What’s the success rate?

Well, some PR folks do chat up with me regarding social media activities. Sometimes, we discuss strategy. There is also some effort on part of certain companies. So, there has to be some strategy. However, am not quite certain of the success rate.

According to Karen Bartleson, Synopsys (an EDA company) is building communities via blogs. (it has thousands of readers globally) forums such as VMM Central (people can ask and answer questions about verification), LinkedIn (the SNUG group - owned by a user - has more than a thousand members), and the Facebook page (which has hundreds of fans and is growing fast - the emphasis is on people and events, not product announcements), and Twitter. Quite interesting.

Next, is the social media really helping reach out to design engineers?

As per an industry friend, social media offers additional channels to engage with engineers beyond the traditional ones. I'm not quite certain whether firms are using Twitter or Facebook to hire, but LinkedIn presents a strong case. I believe, the success ratio there is good.

Web traffic from social media
How much of web traffic to sites is generally referred to by social media? (Web trends analysis suggest otherwise, as do site ranks).

Some say that Web 2.0 'is' social media. However, Google seems to remain and is still the big referrer. Since social channels aren't driving the most traffic today, does "not" mean that the trends won't change.

Karen adds: "As engineers use social media more to connect with each other, they will likely become the top referrers because they trust each other. There's an interesting interview on 60 Minutes from a couple of years ago in which Charlene Li describes why Facebook could overtake Google." Worth a re-look!

Significantly, only leading brands (in semicon/VLSI) rank high on traffic, while the ‘not-so-well known brands’ don’t have high traffic, nor is there any strong presence (or effort) to boost visibility via social media. Why is it so?

Obviously, the leading brands have built up their 'Google juice' over time -- either intentionally or accidentally -- so they easily outrank the lesser well known brands. They also likely invest in keeping their rank high, while smaller firms don't apply resources to their online rank.

Here's some food for thought! Smaller firms, especially, those in India, probably need to rethink their web and social media strategies. First, they need to re-do or re-look their web sites, and add lot of relevant content, in order to build traffic. Once, that's achieved, they can move to social media strategy. Not to worry, help is right here! ;)

Tuesday, November 9, 2010

15 queries on how semicon/VLSI firms associate with social media!

Practically everyone I know, throws this question at me! In fact, I’ve made a list of questions that I am asked by folks from the semiconductor/electronics industry, and of course, by friends and well wishers.

When such questions come my way, I have to take a step back and think — am I a social media expert? The answer — of course not!

I am just a writer, who writes about things that I love — on a platform for writing web logs or ‘blogs’. Sometimes, I may post article links on networking sites such as LinkedIn and Twitter, in the hope that people with some interest in what I write, would like to read what I have written! Now, does that make me a social media expert? Nope! Far from it!

Well, on the subject of how semicon/VLSI and electronics firms should associate with the social media — especially, sites such as Facebook, Twitter, LinkedIn and so on, here are some points that I can think aloud. These are 15 ‘tricky’ questions or statements, not necessary in the order I’ve put down here.

1. How are semicon/VLSI firms using the social media to build communities? Are such firms adopting social media strategies? What’s the success rate?

2. Is the social media really helping reach out to design engineers? Are they hiring via the social media sites? If yes, one would like to know the success rate.

3. How much of web traffic to sites of semicon/VLSI firms is generally referred to by the social media sites? This will be interesting, should someone share an answer!

4.Significantly, only leading brands (in semicon/VLSI) rank high on traffic, while the ‘not-so-well known brands’ don’t have high traffic, nor is there any strong presence (or effort) to boost visibility via social media. Why is it so?

5. Does it indicate that social media managers focus more on ‘boosting’ social media activities for only the large, well known firms? Is it easier to popularize large companies? Is the pay better? Or, can’t the others afford to pay for such services?

6. Building a community seems easier said than done with social media. Well, has it impacted sales for such large firms? I have yet to see a quarterly report state — $2 million sales were generated via leads from Twitter!

7. Corporate blogs — they ‘seem’ to be doing well, as long as those are written by someone currently working in those firms. When the person (s) move — either the blogs are ‘lost’ OR the person’s own blog does not seem to attract much attention. Why so? Again — the issue of brand attachment comes into play. Perhaps, yes.

8. How important is the role of a ‘brand’ in social media? What if the brand is not well known? Will it do well? If not, are enough efforts being made with regard to the branding exercise? Or is it a case of: What’s visible, sells (Jo dikhta hai wo bikta hai)!

9. On the contrary, good blogs written by folks working for the not-so-well known semicon/VLSI firms do not attract that much attention! Why is it so? Is it that such folks are poor writers, or they don’t know their subject?

10. How is Twitter really helping semicon/VLSI firms push sales? Are there visible figures any company can present? Why aren’t they presenting such figures in the first place, if they are indeed available? I have yet to see a quarterly report state something like — ‘$2 million sales came via leads from Twitter’!

11. The same goes for Facebook! What’s the key goal for semicon/VLSI firms who put up their pages on Facebook and other such sites? Traffic? Business? Leads? Or, is it just some number of people who click on a ‘Like’ button?

12. If social media is really so good, why do firms need the press and all that PR? They can simply put up article links for others to read. By the way, I won’t be clicking on any of those links as I prefer the website or magazine!

13. LinkedIn seems to stand out as far as professional networking is concerned. Is there an alternative?

14. Why do firms send out invites stating– please join our Twitter, or Facebook page? What’s the intention? I ask this question when I get such invites — what will I gain by joining a particular feed or page? At least, I know what I need to know about the company. Okay, will they pay me for joining – then I may consider.

15. Why do some firms invite bloggers to join a blogging community? What will the blogger gain? Recognition? He/she already has it — hence, the invite. Will the blogger be paid? ;)

There you have it! I’ve put in 15 questions or comments!

I was quite thrilled to find that the EDA Consortium is organizing a session on Does Social Media Reach the Engineers You Want or Waste Your Time? tomorrow in San Jose, USA. Wish, I could attend and hear what’s being said.

In my next post, I shall attempt to answer some of these 15 ‘tricky’ questions. Do pitch in with your advice, friends! I am still learning, and am a student of the ‘game’.

Thursday, November 4, 2010

India's teaching community contemplates SoC design

The VLSI Society of India recently organized a two-day faculty development workshop on SoC design, -- Train-the-Trainer program -- on Oct. 30-31, 2010, at the Texas Instruments India office, in co-operation with PragaTI (TI India Technical University) and Visweswaraya Technological University (VTU).

I am highly obliged to the VLSI Society of India and Dr. C.P. Ravikumar, technical director, University Relations, Texas Instruments India, for extending an invitation. Here is a report on the workshop, which the VSI Secretariat and Dr. Ravikumar have been most kind to share.
Dr. C.P. Ravikumar, TI, addressing the teachers at the workshop.

System-on-chip (SoC) refers to the technological revolution which allows semiconductor manufacturers to integrate electronic systems on the same chip. System-on-board, which has been the conventional implementation of electronic systems, uses semiconductor chips soldered onto printed circuit boards to realize system functionality.

Systems typically include sensors, analog frontend, digital processors, memories and peripherals. Thanks to the advances in VLSI technology, these sub-systems can be integrated on the same chip, reducing the footprint, cutting down the cost, improving the performance and power efficiency.

While the industry has adopted SoC design for many years, the academic community around the world (India not being an exception) has not caught up with the state-of-the-art. Electrical/electronics engineering departments continue to teach a course on VLSI design, where the level of design abstraction is device-level, transistor-level, or gate-level.

Register-transfer-level (RTL) design using hardware description languages is taught in some Masters’ programs, but colleges often do not have the lab infrastructure to carry out large design projects; very few Indian universities have tie-ups with foundry services to get samples. A semester is too short a time to complete a large project.

The complexity of modern-day design flow is not easy to impart in a single undergraduate course. Masters’ programs are particularly relevant in VLSI, but the M.Tech programs in the country languish due to several reasons.

Ground realities
“M.Tech programs do not attract top students who are highly motivated,” said a professor who attended the two-day faculty development program organized by VLSI Society of India. “Almost all undergraduate programs today have a course on VLSI technology and design. But since we get students from different backgrounds, they do not have the pre-requisites. So, a course on VLSI design at M.Tech level will have a significant overlap with an undergraduate course on VLSI design.”

“Faculty members need training,” said another teacher. “When a new course is introduced, significant time is needed for preparation. Prescribed textbooks for a new course are often not available. Internet search for course materials often returns too much material and it is hard to decide what to use. Colleges that have autonomy can decide their own curriculum, but in a university setup, the faculty face a major challenge. We are evaluated on how well our students fare in the exams. Yet, our students have to face an exam made by a central committee.”

“Having a common exam poses many problems in setting up a relevant question paper. The format of the question paper is fixed. The students get a choice of answering five questions from a set of eight. Due to the common nature of the question paper, the questions tend to demand descriptive answers.”

Faculty development workshop on SoC design
About 30 faculty members interested in system-on-chip design took part in the faculty development workshop. The attendees came from about 25 different colleges from VTU, VIT University, and Anna University. The workshop was conducted in co-operation with the Viswesaraya Technological University (VTU) and sponsored by Texas Instruments, India.

The premise for the workshop was that a course on SoC design is required at the Masters’ level, since industrial practice has clearly moved in that direction. The RTL-to-layout flow, which continues to be relevant for IPs that constitute an SoC, aspects of SoC design, which relies on IP integration, are not covered in any course.

The workshop provided a forum for industry-academia interaction. Several professionals from the industry took part in the workshop and answered questions from the faculty members.

Dr. C.P. Ravikumar, Sarveswara Tammali and Dr. Subir Roy of Texas Instruments, and Raghu Kodali (ARM), took part in the workshop.

Dr. C.P. Ravikumar co-ordinated the workshop and explained the motivation for SoC design in general and for the workshop in particular. Sarveswara Tammali spoke on the topic of “Design for Testability” as applied to SoC. Dr. Subir Roy spoke about the topic of functional verification of SoC.

Raghu Kodali used the example of ARM Cortex-M3 to discuss the entire IP design flow. Apart from the tutorial value of the presentations made at the workshop, the faculty gained through interaction with professionals as well as the discussion on the challenges of teaching advanced topics and the sharing of solutions.

Homework-oriented workshop
At the end of day 1, faculty members received “homework” of identifying the topics that they would include in the seven sections of a course on SoC design.

The faculty presented their ideas on Day 2 and through lively debates were able to align on the teaching materials, the kind of seminars the students can be asked to give as part of the course, the kind of mini-projects that can be given to students, and typical questions that can be included in the course.

Professional development opportunities
Prof. C.R. Venugopal, chairman of the Board of Studies, VTU, advised the faculty members on career development opportunities.

He said: “Becoming a member of a professional society such as the IEEE, IET, or VSI can open up many doors in personal and professional development. I have been mentoring the IEEE Student Chapter at SJCE Mysore. I have also been regularly attending the VLSI Design and Test symposium organized by the VLSI Society of India. These have provided me great opportunities to network with professionals from the industry. There are also many opportunities for submitting research proposals with the university as well as to national bodies that promote academic R&D.”

“The workshop has allowed faculty members to come together to engage in a healthy debate, seek/propose solutions to their problems,” was one of the several enthusiastic feedbacks for the workshop.

It was also decided that a website will be created to share the proceedings of the workshop as well as the links to teaching materials for a course on SoC design.

Wednesday, November 3, 2010

Bluetooth low energy should contribute to WSN via remote monitoring

This is the concluding part of my discussion with Mike Foley, executive director, Bluetooth SIG, which looks at how the market for in-home wireless in smart energy will be developing in the years ahead, as well as the scope in wireless sensor networks (WSN).

Focus of Bluetooth Smart Energy Group
First, a bit about the focus of Bluetooth Smart Energy Group and what it has achieved so far.

The Smart Energy Study Group, includes major players like Emerson, and illustrates the Bluetooth SIG’s commitment to this market. The Study Group is working closely with other standards bodies to help define future global standards for smart energy and the products that form that ecosystem.

Foley said: "Within the next few years, your utility will start to replace your existing meters and you will be able to buy household appliances that can connect to your smart meter. The Bluetooth SIG is working with the industry to ensure that such a connection is cost effective, reliable and secure.

"Currently, Bluetooth is used around the world in smart energy applications -- from simple energy monitors to complex mesh networks controlling solar arrays. With a ubiquitous presence in mobile phones, it also provides an ecosystem for controlling smart energy devices that users already own. The group has come together to make a strong case for Bluetooth in the smart energy market, and to push for next steps in this growing industry."

Market for in-home wireless
Given this scenario, it will be interesting to survey the market for in-home wireless in smart energy developing in the years ahead.

According to Foley, remote control and home automation have a bright future in the smart energy space. If Bluetooth is selected for the connectivity link to appliances, the integration of a smart ecosystem throughout the home will be significantly easier and faster. Once home appliances start to connect, they will likely also require their own wireless connections.

Zpryme Research has predicted that by 2015, 19.2 percent of washing machines, 17.4 percent of refrigerators and 17.3 percent of dryers sold in the US will include smart connections. Also, Whirlpool has publicly announced that by 2015, all of its electronically controlled appliances will be capable of receiving and responding to signals from smart grids.

Scope for wireless sensor networks
Where do things such as scope for wireless sensor networks, or even wireless USB stand, if at all?

Foley added, 'Bluetooth low energy technology, which will be used in the SIG’s smart energy implementation, will be a significant contributor to the overall wireless sensor network market."

According to Kirsten West, principal analyst with West Technology Research, Bluetooth low energy will represent nearly half of all shipments in 2015. If Bluetooth is adopted as the short range wireless standard, Bluetooth low energy will contribute to the WSN through remote monitoring -- i.e., temperature monitoring, home automation, in home displays, etc., and more.

Finally, where do the other competing technologies stand?

Though some technologies may appear to have a head start here, the reality is that the long term success of the standards in this realm remains to be seen. Bluetooth is a proven, globally accepted short range wireless standard. Proven in its use cases, ubiquity, and ease of compatibility.

Additionally, Bluetooth stands apart from competitors in how it diminishes frequency issues, which is a challenge most competitors are still trying to overcome.

"While I believe Bluetooth technology has the most potential to be the go-to wireless standard for smart energy, I do believe that there is room – necessity even – for all types of technologies in this space," Foley concluded.

Tuesday, November 2, 2010

Intel opens manufacturing doors to Achronix! Becomes mini foundry?

For those who are not aware, yesterday, Achronix Semiconductor Corp. announced strategic access to Intel's 22nm process technology, and plans to develop the most advanced FPGAs.

According to the release, the Achronix Speedster22i FPGA family will shatter existing limitations of FPGAs, allowing cost effective production of high performance devices over 2.5M LUTs in size, equivalent to an ASIC of over 20 million gates.

What's really interesting in all of this is the involvement of Intel and Achronix's use of Intel's 22nm technology.

Now, about two weeks ago, Intel announced investment plans between $6-$8 billion on future generations of manufacturing technology in its American facilities. This will fund deployment of Intel’s 22nm manufacturing process across several existing US factories, along with construction of a new development fab in Oregon. The projects will support 6,000-8,000 construction jobs and result in 800-1,000 new, permanent high-tech jobs.

Following this Achronix activity, could it be just the beginning where Intel also allows several others to make use of its latest process technologies, or is it going to be a one-off thing? Probably, the first one! Here's why!

On visiting Intel's site, there's a blog post by Bill Kircos, director, Product and Technology Media Relations, Global Communications Group at Intel.

He says: "With Achronix, we are selectively offering access to our 22nm fabs. For perspective, this deal would only make up a tiny amount of our overall capacity, significantly less than 1 percent, and is not currently viewed as financially material to Intel’s earnings. But it’s still an important endeavor for us that we’re committed to deliver on. I can tell you the folks over at Achronix are very excited about the opportunity and the expected performance boosts they will see in their Intel manufactured products. We are too."

Bill has asked for readers' views on Intel opening up its manufacturing facilities to others. I have given a thumbs up!

Intel has become a mini foundry for the time being. Depending on whether customers find some 'alignment' -- which am sure they will -- this looks to be a good move on part of Intel.

Finally, I had a very excited caller this morning -- an industry friend -- who simply gushed -- 'you should write about this'!

My guess: he and several others are likely to approach Intel for assistance, if not now, then surely in the near future. Smaller companies would stand to benefit in the long run if they can have access to Intel's latest process technologies. Of course, we are talking about really sophisticated chips here!

While we have to see what GlobalFoundries and TSMC have to say, Intel's latest move will probably make it an interesting level-playing field among foundries.

Monday, November 1, 2010

Bluetooth set as short range wireless standard for smart energy!

Back in early 2003, I'd done a story with Anders Edlund, marketing director, EMEA of Bluetooth Special Interest Group (SIG). Those were the days when Bluetooth was just overcoming its teething problems. At that time, the SIG had unveiled a 'five-minute ready' program created to challenge and guide Bluetooth product developers and manufacturers in the Asia Pacific region to deliver devices that give consumers a "five-minute out-of-the-box experience."

Fast forward to 2010! Nearly a fortnight ago, the Bluetooth SIG announced an enhanced focus on the needs of manufacturers of consumer devices in the smart grid environment. This effort, called Bluetooth Smart Energy, addresses the needs for wireless connections of sensors and actuators in the residence.

It is a great pleasure to hook up again with the Bluetooth SIG after quite a few years. Bluetooth as a technology, and Bluetooth SIG itself, have come a long way, very successfully, as well.

In the first part of a two-part discussion on Bluetooth Smart Energy, Mike Foley, executive director of Bluetooth SIG, discusses the rationale behind the Smart Energy effort, how it will benefit users, and whether it can stand up to possible challenges from other technologies.

May I also take this opportunity to thank Ms Jennifer Lopez, who made this possible, along with Starr Million Baker. Back to the story!

Rationale behind Bluetooth SIG's Smart Energy effort
First, obviously, why the effort behind the Bluetooth SIG's smart energy effort and why now!

According to Mike Foley, the smart energy market is a rapidly growing arena and one that the SIG is very interested in expanding its presence.

He said: “As different smart energy projects are planned, developed, and implemented, it is clear that there are different national requirements for each. However, there is an agreement that smart energy within the domestic environment will require the introduction of smart meters – and that is where we come in.

“These meters, which monitor and control our use of electricity, gas, and water, will need to provide real time information to consumers and interact in some form with energy consuming appliances. The interaction will take place with the help of short range wireless connections that are based on an existing standard.

“Bluetooth technology has proven itself to be a universally accepted wireless standard, implemented in a variety of use cases, and is now set to be established as the short range wireless standard for smart energy.”

Challenges from various technologies
Given the case that Bluetooth is positioned to be the short range standard for smart energy, how will it stand up to possible challenges from technologies such as ZigBee, RF4CE, Wi-Fi Direct, ANT, etc?

Foley said: “In my opinion, there is room for different types of technologies in this space. The one thing that has always set Bluetooth technology apart from competitive technologies is its ubiquity. Bluetooth technology is used in a variety of devices and is the go-to wireless standard for mobile phones, which are devices that could play a key role in remote energy monitoring.”

If utilities are going to adopt a short range wireless standard – why not adopt one that already has a presence in a number of key devices that users already own?

Bluetooth is by far the most successful of any of the short range wireless standards. It has been around for just over 10 years (twice as long as ZigBee) and outsells all of the other short range standards put together, with over 1 billion chips shipped every year.

“The very first Bluetooth products can still communicate with new ones that you buy today – something that neither 802.11 nor ZigBee can claim. Equally importantly, over the decade it has been shipping, it has evolved to address all of the key requirements of the smart energy market,” Foley added.

How will users benefit?
The key question: how will users like you and me stand to benefit from the smart energy initiative?

Foley said: “Remote monitoring of energy use is a definite benefit that users will experience through this smart energy initiative. By adopting Bluetooth as the short range wireless standard for the metering domain, the goal is to give users up-to-the minute information on their current energy use.

“The first stage of implementation will happen as new smart meters and energy monitors are deployed, which inform consumers of their energy use. These products are already available, such as Bluetooth enabled energy monitors (Zen and Plogg). They provide a wireless link from a meter or clip-on sensor to a display that can be programmed to show the current cost of electricity consumption. Users will no longer only receive energy usage information at the end of month, when there is nothing they can do to lower their bill or to take back the energy they have already consumed.”

This is said to be just the tip of the iceberg! In the next stage, smart energy will allow the utilities to turn off high energy consuming appliances, where necessary, to balance the grid, eventually lowering a user’s electricity bill as their energy consumption is monitored and balanced appropriately.

Bluetooth SIG also released two key strategy documents. The first document describes the market for in-home wireless in smart energy, domestic HVAC, and home appliances. The second document is a technical justification of Bluetooth technology as the choice for these markets. Both papers are available on the Bluetooth SIG website.

The concluding part of this discussion will look at the market for in-home wireless in smart energy developing in the years ahead, as well as scope of this technology in wireless sensor networks.

Stay tuned folks!