As per James Stansberry, VP & GM Broadcast Products, Silicon Labs, there was the emergence of CMOS RF design in late 1990s. He was speaking at the Globalpress Electronics Summit 2013, being held in Santa Cruz, the US.
CMOS strengths can be maximised in low-cost/high-volume wafer processing, low-power and high density logic that scales with lithography, and switched device architectures enable high-performance ADCs and DACs. Large RAM arrays and NVM are also available.
CMOS weaknesses can be minimized if the noise level at given current (1/f noise), there are low Q integrated inductors, Ft still lags SiGe and GaAs at same power level, and there is lower dynamic range with shriking supply voltages.
There are design LNAs, mixers, VCOs, PLLs and ADCs to compensate for CMOS constraints. It is recommended to use digital logic to detect and correct RF and baseband performance deficiencies. Optimizing a CMOS receiver means to design for cost without power or performance compromise and leverage digital signal processing to optimize RF.
Silicon Labs’ multiband radio receiver solution allows the power of integration. It leads to over 80 percent BoM savings. No manual alignment is required. There is minimal rework and superior RF performance. The BoM cost = -$0.10. Silicon Labs will be introducing the Si468x FM digital radio next week.
Advancing digital radio market
The software-defined radio (SDR) is to support multiple digital radio standards. It also supports worldwide analog FM and RDS/RBDS. It is compatible with iBiquity and NRSC-5 standards for FM digital radio and also compatible with Eureka 147 DAB/DAB+.
It is flexible and cost effective, as the radio-on-a-chip solution is available in WLCSP and QFN packages. It supports module or on-board designs. Silicon Labs is looking to broadening digital radio penetration. It can be seen in handheld clock and tabletop radios and clocks, mobile phones, tablets, PMPs and PNDs, and boom boxes and mini/micro systems.
Sunday, April 21, 2013
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